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Searched refs:BH (Results 1 – 22 of 22) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/
Ddfaddsub.S15 #define BH r3 macro
80 EXPB = extractu(BH,#EXPBITS,#HI_MANTBITS)
128 B_POS = cmp.gt(BH,#-1)
154 BH = togglebit(BH,#31) define
166 BH = #1 define
170 BH = asl(BH,#31) define
174 if (p0.new) AH = xor(AH,BH)
316 p1 = cmp.gt(BH,#-1)
333 BH = ##0x80000000 define
336 if (!p0) AH = or(AH,BH)
[all …]
Ddffma.S19 #define BH r3 macro
147 TMP = xor(AH,BH)
151 EXPB = extractu(BH,#EXPBITS,#HI_MANTBITS)
454 BH = USR define
458 if (p0) BH = or(BH,BL)
461 USR = BH
475 BH = extractu(TMP,#2,#SR_ROUND_OFF) define
480 BH ^= lsr(AH,#31)
481 BL = BH
485 p0 = !cmp.eq(BH,#2)
[all …]
Ddfdiv.S16 #define BH r3 macro
81 EXPBA = combine(BH,AH)
82 SIGN = xor(AH,BH)
88 #undef BH
211 #define BH r3 macro
402 EXPBA = combine(BH,AH)
404 BH = insert(TMP,#DF_EXPBITS+1,#DF_MANTBITS-32) // clear out hidden bit, sign bit define
408 if (P_TMP2) BH = or(BH,TMP) // if normal, add back in hidden bit
435 AH = xor(AH,BH)
450 AH = xor(AH,BH)
Ddfmul.S14 #define BH r3 macro
114 EXP1 = extractu(BH,#EXPBITS,#HI_MANTBITS)
119 TMP = xor(AH,BH)
400 BH = extract(BH,#1,#31) define
403 AH ^= asl(BH,#31)
/freebsd-12-stable/contrib/llvm-project/openmp/runtime/src/
Dkmp_alloc.cpp151 #define BH(p) ((bhead_t *)(p)) macro
499 ba = BH(((char *)b) + (b->bh.bb.bsize - (bufsize)size)); in bget()
500 bn = BH(((char *)ba) + size); in bget()
532 ba = BH(((char *)b) + b->bh.bb.bsize); in bget()
644 b = BH(buf - sizeof(bhead_t)); in bgetz()
679 b = BH(((char *)buf) - sizeof(bhead_t)); in bgetr()
753 KMP_DEBUG_ASSERT(BH((char *)b - b->bh.bb.bsize)->bb.prevfree == 0); in brel()
770 KMP_DEBUG_ASSERT(BH((char *)b - b->bh.bb.prevfree)->bb.bsize == in brel()
796 KMP_DEBUG_ASSERT(BH((char *)bn + bn->bh.bb.bsize)->bb.prevfree == in brel()
839 KMP_DEBUG_ASSERT(BH((char *)b + b->bh.bb.bsize)->bb.bsize == ESent); in brel()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp94 {codeview::RegisterId::BH, X86::BH}, in initLLVMToSEHAndCVRegMapping()
633 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
634 return X86::BH; in getX86SubSuperRegisterOrZero()
645 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
682 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
718 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
754 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
DX86MCCodeEmitter.cpp1227 if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || in emitREXPrefix()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
DX86RegisterInfo.td61 def BH : X86Reg<"bh", 7>;
118 def BX : X86Reg<"bx", 3, [BL,BH]>;
397 // FIXME: Allow AH, CH, DH, BH to be used as general-purpose registers in
403 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
405 let AltOrders = [(sub GR8, AH, BH, CH, DH)];
457 def GR8_ABCD_H : RegisterClass<"X86", [i8], 8, (add AH, CH, DH, BH)>;
470 (add AL, CL, DL, AH, CH, DH, BL, BH)> {
471 let AltOrders = [(sub GR8_NOREX, AH, BH, CH, DH)];
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td1440 bits<2> BH;
1447 let Inst{19-20} = BH;
1461 let BH = 0;
1468 let BH = 0;
1476 let BH = 0;
1533 bits<2> BH;
1543 let Inst{19-20} = BH;
1562 let BH = 0;
1579 let Inst{19-20} = 0; // Unused (BH)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
DARMScheduleSwift.td358 "t2LDR(H|B)(i8|i12|s|pci)", "LDREX", "tLDR[BH](r|i|spi|pci|pciASM)",
492 "t2STR(i12|i8|s)$", "t2STR[BH](i12|i8|s)$", "tSTR[BH](i|r)", "tSTR(i|r)", "tSTRspi")>;
497 "STR(BT|HT|T)", "t2STR_(PRE|POST)", "t2STR[BH]_(PRE|POST)",
498 "t2STR_preidx", "t2STR[BH]_preidx", "t2ST(RB|RH|R)T")>;
DARMScheduleR52.td293 "tLDR[BH](r|i|spi|pci|pciASM)", "tLDR(r|i|spi|pci|pciASM)",
491 "RFE", "t2RFE", "t2STR[BH](i12|i8|s)$", "tSTR[BH](i|r)", "tSTR(i|r)", "tSTRspi")>;
496 "STR(BT|HT|T)", "t2STR_(PRE|POST)", "t2STR[BH]_(PRE|POST)",
497 "t2STR_preidx", "t2STR[BH]_preidx", "t2ST(RB|RH|R)T")>;
/freebsd-12-stable/share/misc/
Diso316639 BH BHR 048 Bahrain
487 # AFGHANISTAN (AF), AZERBAIJAN (AZ), BAHRAIN (BH), BOSNIA AND HERZEGOVINA
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h83 ENTRY(BH) \
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def59 CV_REGISTER(BH, 8)
/freebsd-12-stable/contrib/tzdata/
Dzone1970.tab264 QA,BH +2517+05132 Asia/Qatar
Dzone.tab81 BH +2623+05035 Asia/Bahrain
/freebsd-12-stable/contrib/binutils/opcodes/
Dppc-opc.c181 #define BH BOE + 1 macro
185 #define BT BH + 1
2779 { "bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, { BO, BI, BH } },
2780 { "bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, { BO, BI, BH } },
2973 { "bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, { BO, BI, BH } },
2974 { "bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, { BO, BI, BH } },
Di386-dis.c284 #define BH { OP_IMREG, bh_reg } macro
/freebsd-12-stable/sys/contrib/edk2/Include/Library/
DBaseLib.h6660 UINT8 BH; member
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp3876 if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH) in validateInstruction()
/freebsd-12-stable/contrib/netbsd-tests/usr.bin/netpgpverify/
Dt_netpgpverify.sh765 bAlAlFpDnBTcncFZSq9zWQCH61G1iY4CS16NWnfS3V9nC++BH+1FBWaBrR3XoSok
4182 dsJ73nDn8yjje8/sLaxm5R4G5GI8gwainryI9ndu3R+Z8I7TERw+BH+6heScEiud
/freebsd-12-stable/contrib/file/magic/Magdir/
Darchive895 0 string BH\5\7 BlakHole archive data