Searched refs:AndIdx (Results 1 – 2 of 2) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIOptimizeExecMaskingPreRA.cpp | 83 static bool isDefBetween(const LiveRange &LR, SlotIndex AndIdx, in isDefBetween() argument
85 LiveQueryResult AndLRQ = LR.Query(AndIdx); in isDefBetween()
93 SlotIndex AndIdx = LIS->getInstructionIndex(And); in isDefBetween() local
97 return isDefBetween(LIS->getInterval(Reg), AndIdx, SelIdx); in isDefBetween()
100 if (isDefBetween(LIS->getRegUnit(*UI), AndIdx, SelIdx)) in isDefBetween()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 2764 SDValue AndIdx = DAG.getNode(ISD::AND, DL, MVT::i64, {Idx, Const1}); in lowerEXTRACT_VECTOR_ELT() local
2765 SDValue Shift = DAG.getNode(ISD::XOR, DL, MVT::i64, {AndIdx, Const1}); in lowerEXTRACT_VECTOR_ELT()
2822 SDValue AndIdx = DAG.getNode(ISD::AND, DL, MVT::i64, {Idx, Const1}); in lowerINSERT_VECTOR_ELT() local
2823 SDValue Shift = DAG.getNode(ISD::XOR, DL, MVT::i64, {AndIdx, Const1}); in lowerINSERT_VECTOR_ELT()
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