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Searched refs:AVR (Results 1 – 25 of 70) sorted by relevance

123

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
DAVRELFObjectWriter.cpp81 case AVR::fixup_32: in getRelocType()
83 case AVR::fixup_7_pcrel: in getRelocType()
85 case AVR::fixup_13_pcrel: in getRelocType()
87 case AVR::fixup_16: in getRelocType()
89 case AVR::fixup_16_pm: in getRelocType()
91 case AVR::fixup_lo8_ldi: in getRelocType()
93 case AVR::fixup_hi8_ldi: in getRelocType()
95 case AVR::fixup_hh8_ldi: in getRelocType()
97 case AVR::fixup_lo8_ldi_neg: in getRelocType()
99 case AVR::fixup_hi8_ldi_neg: in getRelocType()
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DAVRELFStreamer.cpp16 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
18 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
20 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
22 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
24 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
26 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
28 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
30 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
32 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet()
34 else if (Features[AVR::ELFArchAVR6]) in getEFlagsForFeatureSet()
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DAVRAsmBackend.cpp84 AVR::fixups::adjustBranchTarget(Value); in adjustBranch()
95 AVR::fixups::adjustBranchTarget(Value); in adjustRelativeBranch()
253 case AVR::fixup_7_pcrel: in adjustFixupValue()
256 case AVR::fixup_13_pcrel: in adjustFixupValue()
259 case AVR::fixup_call: in adjustFixupValue()
262 case AVR::fixup_ldi: in adjustFixupValue()
265 case AVR::fixup_lo8_ldi: in adjustFixupValue()
268 case AVR::fixup_lo8_ldi_pm: in adjustFixupValue()
269 case AVR::fixup_lo8_ldi_gs: in adjustFixupValue()
273 case AVR::fixup_hi8_ldi: in adjustFixupValue()
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DAVRMCExpr.cpp149 AVR::Fixups AVRMCExpr::getFixupKind() const { in getFixupKind()
150 AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind; in getFixupKind()
154 Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi; in getFixupKind()
157 Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi; in getFixupKind()
160 Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi; in getFixupKind()
163 Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi; in getFixupKind()
167 Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm; in getFixupKind()
170 Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm; in getFixupKind()
173 Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm; in getFixupKind()
177 Kind = AVR::fixup_16_pm; in getFixupKind()
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DAVRInstPrinter.cpp44 case AVR::LDRdPtr: in printInst()
45 case AVR::LDRdPtrPi: in printInst()
46 case AVR::LDRdPtrPd: in printInst()
51 if (Opcode == AVR::LDRdPtrPd) in printInst()
56 if (Opcode == AVR::LDRdPtrPi) in printInst()
59 case AVR::STPtrRr: in printInst()
65 case AVR::STPtrPiRr: in printInst()
66 case AVR::STPtrPdRr: in printInst()
69 if (Opcode == AVR::STPtrPdRr) in printInst()
74 if (Opcode == AVR::STPtrPiRr) in printInst()
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DAVRMCCodeEmitter.cpp77 bool IsRegX = MI.getOperand(0).getReg() == AVR::R27R26 || in loadStorePostEncoder()
78 MI.getOperand(1).getReg() == AVR::R27R26; in loadStorePostEncoder()
80 bool IsPredec = Opcode == AVR::LDRdPtrPd || Opcode == AVR::STPtrPdRr; in loadStorePostEncoder()
81 bool IsPostinc = Opcode == AVR::LDRdPtrPi || Opcode == AVR::STPtrPiRr; in loadStorePostEncoder()
91 template <AVR::Fixups Fixup>
109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget()
122 case AVR::R27R26: return 0x03; // X: 0b11 in encodeLDSTPtrReg()
123 case AVR::R29R28: return 0x02; // Y: 0b10 in encodeLDSTPtrReg()
124 case AVR::R31R30: return 0x00; // Z: 0b00 in encodeLDSTPtrReg()
147 case AVR::R31R30: in encodeMemri()
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DAVRMCCodeEmitter.h50 template <AVR::Fixups Fixup>
72 template <AVR::Fixups Fixup, unsigned Offset>
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/
DAVRFrameLowering.cpp63 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue()
71 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr)) in emitPrologue()
72 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
75 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
78 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
79 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
82 .addReg(AVR::R0, RegState::Define) in emitPrologue()
83 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
84 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
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DAVRInstrInfo.cpp39 : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI() {} in AVRInstrInfo()
50 if (AVR::DREGSRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
51 if (STI.hasMOVW() && AVR::DREGSMOVWRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
52 BuildMI(MBB, MI, DL, get(AVR::MOVWRdRr), DestReg) in copyPhysReg()
61 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestLo) in copyPhysReg()
63 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestHi) in copyPhysReg()
67 if (AVR::GPR8RegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
68 Opc = AVR::MOVRdRr; in copyPhysReg()
69 } else if (SrcReg == AVR::SP && AVR::DREGSRegClass.contains(DestReg)) { in copyPhysReg()
70 Opc = AVR::SPREAD; in copyPhysReg()
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DAVRRegisterInfo.cpp60 Reserved.set(AVR::R0); in getReservedRegs()
61 Reserved.set(AVR::R1); in getReservedRegs()
62 Reserved.set(AVR::R1R0); in getReservedRegs()
65 Reserved.set(AVR::SPL); in getReservedRegs()
66 Reserved.set(AVR::SPH); in getReservedRegs()
67 Reserved.set(AVR::SP); in getReservedRegs()
78 Reserved.set(AVR::R28); in getReservedRegs()
79 Reserved.set(AVR::R29); in getReservedRegs()
80 Reserved.set(AVR::R29R28); in getReservedRegs()
90 return &AVR::DREGSRegClass; in getLargestLegalSuperClass()
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DAVRExpandPseudoInsts.cpp54 const Register SCRATCH_REGISTER = AVR::R0;
56 const Register ZERO_REGISTER = AVR::R1;
223 if (Op == AVR::ANDIRdK && ImmVal == 0xff) in isLogicImmOpRedundant()
227 if (Op == AVR::ORIRdK && ImmVal == 0x0) in isLogicImmOpRedundant()
271 bool AVRExpandPseudo::expand<AVR::ADDWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
272 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
276 bool AVRExpandPseudo::expand<AVR::ADCWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
277 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
281 bool AVRExpandPseudo::expand<AVR::SUBWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
282 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
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DAVRISelLowering.cpp39 addRegisterClass(MVT::i8, &AVR::GPR8RegClass); in AVRTargetLowering()
40 addRegisterClass(MVT::i16, &AVR::DREGSRegClass); in AVRTargetLowering()
48 setStackPointerRegisterToSaveRestore(AVR::SP); in AVRTargetLowering()
868 if (isa<PointerType>(Ty) && AS == AVR::ProgramMemory) { in isLegalAddressingMode()
898 if (AVR::isProgramMemoryAccess(LD)) { in getPreIndexedAddressParts()
904 if (AVR::isProgramMemoryAccess(ST)) { in getPreIndexedAddressParts()
955 if (AVR::isProgramMemoryAccess(ST)) { in getPostIndexedAddressParts()
1002 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
1003 AVR::R19, AVR::R18, AVR::R17, AVR::R16, AVR::R15, AVR::R14,
1004 AVR::R13, AVR::R12, AVR::R11, AVR::R10, AVR::R9, AVR::R8};
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DAVRISelDAGToDAG.cpp144 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
152 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
185 Opcode = AVR::LPMRdZPi; in selectIndexedProgMemLoad()
192 Opcode = AVR::LPMWRdZPi; in selectIndexedProgMemLoad()
219 RI.getRegClass(RegNode->getReg()) == &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand()
252 AVR::PTRDISPREGSRegClass.contains(Reg)); in SelectInlineAsmMemoryOperand()
262 if (RI.getRegClass(Reg) != &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand()
265 Register VReg = RI.createVirtualRegister(&AVR::PTRDISPREGSRegClass); in SelectInlineAsmMemoryOperand()
294 Register VReg = RI.createVirtualRegister(&AVR::PTRDISPREGSRegClass); in SelectInlineAsmMemoryOperand()
314 CurDAG->SelectNodeTo(N, AVR::FRMIDX, in select()
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DAVRRegisterInfo.td1 //===-- AVRRegisterInfo.td - AVR Register defs -------------*- tablegen -*-===//
10 // Declarations that describe the AVR register file
23 let Namespace = "AVR";
29 let Namespace = "AVR" in
35 let Namespace = "AVR" in {
124 def GPR8 : RegisterClass<"AVR", [i8], 8,
136 def GPR8lo : RegisterClass<"AVR", [i8], 8,
142 def LD8 : RegisterClass<"AVR", [i8], 8,
153 def LD8lo : RegisterClass<"AVR", [i8], 8,
159 def DREGS : RegisterClass<"AVR", [i16], 8,
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DAVRRelaxMemOperations.cpp88 bool AVRRelaxMem::relax<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) { in relax()
99 buildMI(MBB, MBBI, AVR::PUSHWRr) in relax()
103 buildMI(MBB, MBBI, AVR::SBCIWRdK) in relax()
110 buildMI(MBB, MBBI, AVR::STWPtrRr) in relax()
115 buildMI(MBB, MBBI, AVR::POPWRd) in relax()
133 RELAX(AVR::STDWPtrQRr); in runOnInstruction()
DAVR.td1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
8 // This is the top level entry point for the AVR target.
18 // AVR Device Definitions
73 def AVR : Target {
DAVRCallingConv.td1 //===-- AVRCallingConv.td - Calling Conventions for AVR ----*- tablegen -*-===//
8 // This describes the calling conventions for AVR architecture.
13 // AVR Return Value Calling Convention
24 // AVR Argument Calling Conventions
DREADME.md1 # AVR backend
3 This experimental backend is for the 8-bit Atmel [AVR](https://en.wikipedia.org/wiki/Atmel_AVR) mic…
7 * [Unresolved bugs](https://llvm.org/bugs/buglist.cgi?product=libraries&component=Backend%3A%20AVR&…
DAVRAsmPrinter.cpp124 Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi in PrintAsmOperand()
125 : AVR::sub_lo); in PrintAsmOperand()
154 if (MI->getOperand(OpNum).getReg() == AVR::R31R30) { in PrintAsmMemoryOperand()
157 assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 && in PrintAsmMemoryOperand()
186 bool IsProgMem = GV->getAddressSpace() == AVR::ProgramMemory; in lowerConstant()
DAVRInstrFormats.td1 //===-- AVRInstrInfo.td - AVR Instruction Formats ----------*- tablegen -*-===//
9 // AVR Instruction Format Definitions.
13 // A generic AVR instruction.
16 let Namespace = "AVR";
26 /// A 16-bit AVR instruction.
35 /// a 32-bit AVR instruction.
45 // Pseudo instructions are not real AVR instructions. The DAG stores
46 // pseudo instructions which are replaced by real AVR instructions by
DAVRTargetObjectFile.cpp33 if (AVR::isProgramMemoryAddress(GO) && !GO->hasSection() && Kind.isReadOnly()) in SelectSectionForGlobal()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
DAVRDisassembler.cpp61 AVR::R0, AVR::R1, AVR::R2, AVR::R3,
62 AVR::R4, AVR::R5, AVR::R6, AVR::R7,
63 AVR::R8, AVR::R9, AVR::R10, AVR::R11,
64 AVR::R12, AVR::R13, AVR::R14, AVR::R15,
65 AVR::R16, AVR::R17, AVR::R18, AVR::R19,
66 AVR::R20, AVR::R21, AVR::R22, AVR::R23,
67 AVR::R24, AVR::R25, AVR::R26, AVR::R27,
68 AVR::R28, AVR::R29, AVR::R30, AVR::R31,
183 Inst.addOperand(MCOperand::createReg(AVR::R31R30)); in decodeFLPMX()
/freebsd-12-stable/contrib/binutils/gas/doc/
Dc-avr.texi8 @node AVR-Dependent
9 @chapter AVR Dependent Features
14 @chapter AVR Dependent Features
17 @cindex AVR support
19 * AVR Options:: Options
20 * AVR Syntax:: Syntax
21 * AVR Opcodes:: Opcodes
24 @node AVR Options
26 @cindex AVR options (none)
27 @cindex options for AVR (none)
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/freebsd-12-stable/contrib/llvm-project/lld/ELF/Arch/
DAVR.cpp43 class AVR final : public TargetInfo { class
45 AVR();
54 AVR::AVR() { noneRel = R_AVR_NONE; } in AVR() function in AVR
56 RelExpr AVR::getRelExpr(RelType type, const Symbol &s, in getRelExpr()
98 void AVR::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { in relocate()
223 static AVR target; in getAVRTargetInfo()
231 uint32_t AVR::calcEFlags() const { in calcEFlags()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/
DAVRAsmParser.cpp77 unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) { in toDREG()
78 MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID]; in toDREG()
344 if (RegNum == AVR::NoRegister) { in parseRegisterName()
347 if (RegNum == AVR::NoRegister) { in parseRegisterName()
357 if (RegNum == AVR::NoRegister) in parseRegisterName()
364 int RegNum = AVR::NoRegister; in parseRegister()
378 if (RegNum == AVR::NoRegister && RestoreOnFailure) { in parseRegister()
392 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand()
567 if (RegNo == AVR::NoRegister) in parseMemriOperand()
593 return (RegNo == AVR::NoRegister); in ParseRegister()
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