Home
last modified time | relevance | path

Searched refs:AR_INTR_ASYNC_ENABLE (Results 1 – 8 of 8) sorted by relevance

/freebsd-12-stable/sys/dev/ath/ath_hal/ar5416/
Dar5416_gpio.c219 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), in ar5416GpioSetIntr()
221 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, in ar5416GpioSetIntr()
258 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), in ar5416GpioSetIntr()
260 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, in ar5416GpioSetIntr()
Dar5416_interrupts.c281 OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 0); in ar5416SetInterrupts()
282 (void) OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE); in ar5416SetInterrupts()
367 OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, mask); in ar5416SetInterrupts()
Dar5416reg.h46 #define AR_INTR_ASYNC_ENABLE 0x403c /* enable interrupts */ macro
/freebsd-12-stable/sys/contrib/dev/ath/ath_hal/ar9300/
Dar9300_interrupts.c528 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE), 0);
530 (void) OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE));
687 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE), mask);
Dar9300_gpio.c438 regs[0] = AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE); in ar9300_gpio_set_intr()
622 OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE))); in ar9300_gpio_show()
Dar9300_attach.c4136 AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE) = in ar9300_init_hostif_offsets()
4243 AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE) = in ar9340_init_hostif_offsets()
Dar9300.h734 u_int32_t AR_INTR_ASYNC_ENABLE; member
/freebsd-12-stable/tools/tools/ath/common/
Ddumpregs_5416.c278 DEFVOID(AR_INTR_ASYNC_ENABLE,"INTR_ASYNC_ENABLE"),