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Searched refs:writeback (Results 1 – 25 of 33) sorted by relevance

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/freebsd-11-stable/contrib/gcc/config/arm/
HDarm1136jfs.md47 ;; and saturation stages. The fourth stage is writeback; see below.
50 ;; MAC1 through MAC3, and a fourth writeback stage.
52 ;; The 4th-stage writeback is shared between the ALU and MAC pipelines,
54 ;; moved into the writeback stage. Because the two pipelines operate
58 ;; data cache (2), and writeback stages. (Note that this pipeline,
59 ;; including the writeback stage, is independent from the ALU & LSU pipes.)
280 ;; the difference between operations with a base register writeback.
290 ;; Load byte results are not available until the writeback stage, where
HDvfp.md35 ;; - A 8-stage FMAC pipeline (7 execute + writeback) with forward from
38 ;; - A 5-stage DS pipeline (4 execute + writeback) for divide/sqrt insns.
41 ;; - A 4-stage LS pipeline (execute + 2 memory + writeback) with forward from
HDarm926ejs.md118 ;; the difference between operations with a base register writeback
HDarm1026ejs.md155 ;; the difference between operations with a base register writeback
HDarm1020e.md155 ;; the difference between operations with a base register writeback
/freebsd-11-stable/usr.bin/mail/
HDquit.c185 writeback(rbuf); in quit()
295 writeback(rbuf); in quit()
336 writeback(FILE *res) in writeback() function
HDextern.h249 int writeback(FILE *);
/freebsd-11-stable/sys/dev/virtio/block/
HDvirtio_blk.h74 uint8_t writeback; member
HDvirtio_blk.c1121 VTBLK_GET_CONFIG(dev, VIRTIO_BLK_F_CONFIG_WCE, writeback, blkcfg); in vtblk_read_config()
1328 offsetof(struct virtio_blk_config, writeback), wc); in vtblk_set_write_cache()
1343 wc = blkcfg->writeback; in vtblk_write_cache_enabled()
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/
HDCGCall.h307 Writeback writeback = {srcLV, temporary, toUse}; in addWriteback() local
308 Writebacks.push_back(writeback); in addWriteback()
HDCGCall.cpp3148 const CallArgList::Writeback &writeback) { in emitWriteback() argument
3149 const LValue &srcLV = writeback.Source; in emitWriteback()
3171 llvm::Value *value = CGF.Builder.CreateLoad(writeback.Temporary); in emitWriteback()
3184 if (writeback.ToUse) { in emitWriteback()
3192 CGF.EmitARCIntrinsicUse(writeback.ToUse); in emitWriteback()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64SchedCyclone.td64 // consumes the pipe for one cycle at issue and another cycle at writeback.
93 // but only consume the pipe for one cycle at issue and a cycle at writeback.
206 // The ID pipe is consumed for 2 cycles: issue and writeback.
213 // The ID pipe is consumed for 2 cycles: issue and writeback.
629 // Only the first WriteVLD and WriteAdr for writeback matches def operands.
770 // Only the WriteAdr for writeback matches a def operands.
/freebsd-11-stable/contrib/binutils/gas/config/
HDtc-arm.c344 unsigned writeback : 1; /* Operand has trailing ! */ member
4748 inst.operands[i].writeback = 1; in parse_address_main()
4775 inst.operands[i].writeback = 1; in parse_address_main()
5740 inst.operands[i].writeback = 1; in parse_operands()
5783 inst.operands[i].writeback = 1; in parse_operands()
5935 inst.operands[1].writeback = 1; in parse_operands()
6262 if (inst.operands[i].writeback) in encode_arm_addr_mode_common()
6268 assert (inst.operands[i].writeback); in encode_arm_addr_mode_common()
6366 assert (!inst.operands[i].writeback); in encode_arm_cp_address()
6380 if (inst.operands[i].writeback) in encode_arm_cp_address()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
HDARMDisassembler.cpp1880 bool writeback = (P == 0) || (W == 1); in DecodeAddrMode2IdxInstruction() local
1882 if (P && writeback) in DecodeAddrMode2IdxInstruction()
1884 else if (!P && writeback) in DecodeAddrMode2IdxInstruction()
1887 if (writeback && (Rn == 15 || Rn == Rt)) in DecodeAddrMode2IdxInstruction()
1987 bool writeback = (W == 1) | (P == 0); in DecodeAddrMode3Instruction() local
2009 if (writeback && (Rn == 15 || Rn == Rt || Rn == Rt2)) in DecodeAddrMode3Instruction()
2023 if (writeback && (Rn == 15 || Rn == Rt)) in DecodeAddrMode3Instruction()
2040 if (!type && writeback && Rn == 15) in DecodeAddrMode3Instruction()
2042 if (writeback && (Rn == Rt || Rn == Rt2)) in DecodeAddrMode3Instruction()
2057 if (!type && writeback && (Rn == 15 || Rn == Rt)) in DecodeAddrMode3Instruction()
[all …]
/freebsd-11-stable/contrib/binutils/opcodes/
HDarm-dis.c3446 bfd_boolean writeback = FALSE, postind = FALSE; in print_insn_thumb32() local
3476 writeback = TRUE; in print_insn_thumb32()
3481 writeback = TRUE; in print_insn_thumb32()
3505 func (stream, writeback ? "]!" : "]"); in print_insn_thumb32()
HDChangeLog100 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMScheduleA9.td447 // register file writeback!).
2336 // A9WriteAdr consumes AGU regardless address writeback. But it's
2346 // Store either has no def operands, or the one def for address writeback.
2364 // Load multiple with address writeback has an extra def operand in
2368 // resources are identical, For stores only the address writeback
2383 // Note: Unlike VLDM, VLD1 expects the writeback operand after the
2404 // address writeback.
HDARMScheduleA57.td595 // TODO: no writeback latency defined in documentation (implemented as 1 cyc)
629 // Store, immed pre-indexed (1cyc "S, I0/I1", 1cyc writeback)
691 // TODO: no writeback latency defined in documentation
1270 // 1-2 reg: 5cyc L, +I for writeback, 1 cyc wb latency
1275 // 3-4 reg: 6cyc L, +I for writeback, 1 cyc wb latency
HDARMInstrMVE.td4906 class MVE_vldst24_base<bit writeback, bit fourregs, bits<2> stage, bits<2> size,
4915 let Inst{21} = writeback;
4929 // A parameter class used to encapsulate all the ways the writeback
4930 // variants of VLD20 and friends differ from the non-writeback ones.
4933 bit writeback = b;
4964 : MVE_vldst24_base<wb.writeback, n.bit0, pat, size, 1,
4973 : MVE_vldst24_base<wb.writeback, n.bit0, pat, size, 0,
4981 // vector lane; writeback or no writeback.
5145 // generate three writeback modes (none, preindex, postindex).
5209 // names shown in the defm, with _pre or _post appended for writeback,
[all …]
HDARMInstrNEON.td650 // ...with address register writeback:
830 // ...with address register writeback:
903 // ...with address register writeback:
963 // ...with address register writeback:
1113 // ...with address register writeback:
1176 // ...with address register writeback:
1247 // ...with address register writeback:
1325 // ...with address register writeback:
1417 // ...with address register writeback:
1499 // ...with address register writeback:
[all …]
HDARMInstrVFP.td199 let Inst{21} = 0; // No writeback
227 let Inst{21} = 0; // No writeback
335 let Inst{21} = 0; // No writeback
HDARMScheduleSwift.td93 // Plain load without writeback.
/freebsd-11-stable/sys/netpfil/pf/
HDpf_norm.c1356 struct pf_state_peer *src, struct pf_state_peer *dst, int *writeback) in pf_normalize_tcp_stateful() argument
1469 *writeback = 1; in pf_normalize_tcp_stateful()
/freebsd-11-stable/contrib/binutils/opcodes/po/
HDopcodes.pot70 msgid "address writeback not allowed"
/freebsd-11-stable/contrib/binutils/gas/po/
HDgas.pot1919 msgid "instruction does not support writeback"
1956 msgid "writeback of base register is UNPREDICTABLE"
1960 msgid "writeback of base register when in register list is UNPREDICTABLE"
1964 msgid "if writeback register is in list, it must be the lowest reg in the list"
2041 msgid "writeback used in preload instruction"
2069 msgid "this addressing mode requires base-register writeback"
2113 msgid "Thumb does not support register indexing with writeback"
2125 msgid "cannot use writeback with PC-relative addressing"
2129 msgid "cannot use writeback with this instruction"
2371 msgid "writeback (!) must be used for VLDMDB and VSTMDB"

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