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Searched refs:umin (Results 1 – 25 of 42) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
HDConstantRange.cpp1021 ConstantRange::umin(const ConstantRange &Other) const { in umin() function in ConstantRange
1026 APInt NewL = APIntOps::umin(getUnsignedMin(), Other.getUnsignedMin()); in umin()
1027 APInt NewU = APIntOps::umin(getUnsignedMax(), Other.getUnsignedMax()) + 1; in umin()
1146 APInt Upper = APIntOps::umin(getUnsignedMax(), RHS.getUnsignedMax() - 1) + 1; in urem()
1173 APInt Upper = APIntOps::umin(MaxLHS, MaxAbsRHS - 1) + 1; in srem()
1188 APInt Upper = APIntOps::umin(MaxLHS, MaxAbsRHS - 1) + 1; in srem()
1199 APInt umin = APIntOps::umin(Other.getUnsignedMax(), getUnsignedMax()); in binaryAnd() local
1200 return getNonEmpty(APInt::getNullValue(getBitWidth()), std::move(umin) + 1); in binaryAnd()
1409 Lo = APIntOps::umin(Lower, -Upper + 1); in abs()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/
HDConstantRange.h380 ConstantRange umin(const ConstantRange &Other) const;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
HDSelectionDAGCompat.td117 def : GINodeEquiv<G_UMIN, umin>;
/freebsd-11-stable/contrib/gcc/config/ia64/
HDvect.md265 (define_expand "umin<mode>3"
267 (umin:VECINT (match_operand:VECINT 1 "gr_register_operand" "")
303 (umin:V8QI (match_operand:V8QI 1 "gr_register_operand" "r")
/freebsd-11-stable/contrib/gcc/config/arm/
HDiwmmxt.md791 (umin:V8QI (match_operand:V8QI 1 "register_operand" "y")
807 (umin:V4HI (match_operand:V4HI 1 "register_operand" "y")
823 (umin:V2SI (match_operand:V2SI 1 "register_operand" "y")
HDpredicates.md186 (and (match_code "smin,smax,umin,umax")
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMipsMSAInstrInfo.td2414 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", umin, MSA128BOpnd>;
2415 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", umin, MSA128HOpnd>;
2416 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", umin, MSA128WOpnd>;
2417 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", umin, MSA128DOpnd>;
2428 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", umin, vsplati8_uimm5,
2430 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", umin, vsplati16_uimm5,
2432 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", umin, vsplati32_uimm5,
2434 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", umin, vsplati64_uimm5,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDVOP2Instructions.td478 defm V_MIN_U32 : VOP2Inst <"v_min_u32", VOP_PAT_GEN<VOP_I32_I32_I32>, umin>;
634 defm V_MIN_U16 : VOP2Inst <"v_min_u16", VOP_I16_I16_I16, umin>;
790 defm : Arithmetic_i16_0Hi_Pats<umin, V_MIN_U16_e64>;
HDSIInstructions.td1436 (umin i32:$src0, i32:$src1)),
1999 defm : IntMed3Pat<V_MED3_U32, umin, umax, umin_oneuse, umax_oneuse>;
2051 defm : Int16Med3Pat<V_MED3_U16, umin, umax, umax_oneuse, umin_oneuse>;
HDVOP3PInstructions.td60 def V_PK_MIN_U16 : VOP3PInst<"v_pk_min_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, umin>;
HDAMDGPUInstructions.td190 def umin_oneuse : HasOneUseBinOp<umin>;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/AsmParser/
HDLLLexer.cpp715 KEYWORD(umin); in LexIdentifier()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/ADT/
HDAPInt.h2172 inline const APInt &umin(const APInt &A, const APInt &B) { in umin() function
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCInstrAltivec.td929 def : Pat<(v16i8 (umin v16i8:$src1, v16i8:$src2)),
933 def : Pat<(v8i16 (umin v8i16:$src1, v8i16:$src2)),
937 def : Pat<(v4i32 (umin v4i32:$src1, v4i32:$src2)),
/freebsd-11-stable/contrib/gcc/config/rs6000/
HDaltivec.md705 (define_insn "umin<mode>3"
707 (umin:VI (match_operand:VI 1 "register_operand" "v")
HDpredicates.md791 (match_code "smin,smax,umin,umax"))
/freebsd-11-stable/contrib/gcc/config/i386/
HDsse.md2908 (umin:V16QI (match_operand:V16QI 1 "nonimmediate_operand" "")
2915 (umin:V16QI (match_operand:V16QI 1 "nonimmediate_operand" "%0")
2958 (define_expand "umin<mode>3"
2960 (umin:SSEMODE24 (match_operand:SSEMODE24 1 "register_operand" "")
HDpredicates.md958 (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
HDmmx.md760 (umin:V8QI (match_operand:V8QI 1 "nonimmediate_operand" "%0")
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64SVEInstrInfo.td139 defm UMIN_ZI : sve_int_arith_imm1_unsigned<0b11, "umin", umin>;
177 defm UMIN_ZPmZ : sve_int_bin_pred_arit_1<0b011, "umin", int_aarch64_sve_umin>;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDBasicAliasAnalysis.cpp2025 MinDiff = APIntOps::umin(MinDiff, Wrapped); in constantOffsetHeuristic()
HDLazyValueInfo.cpp907 return TrueCR.umin(FalseCR); in solveBlockValueSelect()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
HDWebAssemblyInstrSIMD.td736 defm MIN_U : SIMDBinaryIntNoI64x2<umin, "min_u", 95>;
/freebsd-11-stable/contrib/llvm-project/clang/lib/Headers/
HD__clang_cuda_device_functions.h1780 __DEVICE__ unsigned int umin(unsigned int __a, unsigned int __b) { in umin() function
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86InstrSSE.td3462 defm PMINUB : PDI_binop_all<0xDA, "pminub", umin, v16i8, v32i8,
5760 defm VPMINUD : SS48I_binop_rm<0x3B, "vpminud", umin, v4i32, VR128,
5777 defm VPMINUW : SS48I_binop_rm<0x3A, "vpminuw", umin, v8i16, VR128,
5792 defm VPMINUDY : SS48I_binop_rm<0x3B, "vpminud", umin, v8i32, VR256,
5809 defm VPMINUWY : SS48I_binop_rm<0x3A, "vpminuw", umin, v16i16, VR256,
5825 defm PMINUD : SS48I_binop_rm<0x3B, "pminud", umin, v4i32, VR128,
5827 defm PMINUW : SS48I_binop_rm<0x3A, "pminuw", umin, v8i16, VR128,

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