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Searched refs:phy_ctrl (Results 1 – 14 of 14) sorted by relevance

/freebsd-11-stable/sys/dev/e1000/
HDe1000_phy.c1628 u16 phy_ctrl; in e1000_copper_link_autoneg() local
1654 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in e1000_copper_link_autoneg()
1658 phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG); in e1000_copper_link_autoneg()
1659 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in e1000_copper_link_autoneg()
2014 void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl) in e1000_phy_force_speed_duplex_setup() argument
2033 *phy_ctrl &= ~MII_CR_AUTO_NEG_EN; in e1000_phy_force_speed_duplex_setup()
2038 *phy_ctrl &= ~MII_CR_FULL_DUPLEX; in e1000_phy_force_speed_duplex_setup()
2042 *phy_ctrl |= MII_CR_FULL_DUPLEX; in e1000_phy_force_speed_duplex_setup()
2049 *phy_ctrl |= MII_CR_SPEED_100; in e1000_phy_force_speed_duplex_setup()
2050 *phy_ctrl &= ~MII_CR_SPEED_1000; in e1000_phy_force_speed_duplex_setup()
[all …]
HDe1000_ich8lan.c3225 u32 phy_ctrl; in e1000_set_d0_lplu_state_ich8lan() local
3234 phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL); in e1000_set_d0_lplu_state_ich8lan()
3237 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state_ich8lan()
3238 E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
3262 phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU; in e1000_set_d0_lplu_state_ich8lan()
3263 E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
3321 u32 phy_ctrl; in e1000_set_d3_lplu_state_ich8lan() local
3327 phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL); in e1000_set_d3_lplu_state_ich8lan()
3330 phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU; in e1000_set_d3_lplu_state_ich8lan()
3331 E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state_ich8lan()
[all …]
HDe1000_phy.h70 void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
/freebsd-11-stable/sys/dev/bwi/
HDif_bwi.c2926 uint16_t phy_ctrl; in bwi_encap() local
3018 phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode, in bwi_encap()
3021 phy_ctrl |= BWI_TXH_PHY_C_OFDM; in bwi_encap()
3023 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE; in bwi_encap()
3032 hdr->txh_phy_ctrl = htole16(phy_ctrl); in bwi_encap()
3117 uint16_t phy_ctrl; in bwi_encap_raw() local
3200 phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode, in bwi_encap_raw()
3203 phy_ctrl |= BWI_TXH_PHY_C_OFDM; in bwi_encap_raw()
3206 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE; in bwi_encap_raw()
3209 hdr->txh_phy_ctrl = htole16(phy_ctrl); in bwi_encap_raw()
/freebsd-11-stable/sys/gnu/dts/arm/
HDsun8i-a23.dtsi105 reg-names = "phy_ctrl",
HDsun8i-a33.dtsi147 reg-names = "phy_ctrl",
HDdm814x.dtsi345 reg-names = "phy_ctrl", "wakeup";
HDsun5i.dtsi455 reg-names = "phy_ctrl", "pmu1";
HDam33xx.dtsi554 reg-names = "phy_ctrl", "wakeup";
HDsun6i-a31.dtsi565 reg-names = "phy_ctrl",
HDsun4i-a10.dtsi721 reg-names = "phy_ctrl", "pmu1", "pmu2";
HDsun7i-a20.dtsi803 reg-names = "phy_ctrl", "pmu1", "pmu2";
/freebsd-11-stable/sys/contrib/octeon-sdk/
HDcvmx-pciercx-defs.h5763 uint32_t phy_ctrl : 32; /**< PHY Control */ member
5765 uint32_t phy_ctrl : 32;
HDcvmx-pcieepx-defs.h6065 uint32_t phy_ctrl : 32; /**< PHY Control */ member
6067 uint32_t phy_ctrl : 32;