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Searched refs:phy_addr (Results 1 – 25 of 48) sorted by relevance

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/freebsd-11-stable/sys/contrib/octeon-sdk/
HDcvmx-helper-board.c181 int phy_addr; member
213 phy_info.phy_addr = -1; in __get_phy_info_from_dt()
314 phy_info.phy_addr = cvmx_be32_to_cpu(*phy_addr_ptr) | mdio_unit << 8; in __get_phy_info_from_dt()
331 return phy_info.phy_addr; in cvmx_helper_board_get_mii_address_from_dt()
380 if (phy_info.phy_addr >= 0) return phy_info.phy_addr; in cvmx_helper_board_get_mii_address()
650 static cvmx_helper_link_info_t __get_marvell_phy_link_state(int phy_addr) in __get_marvell_phy_link_state() argument
657 phy_status = cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff, 17); in __get_marvell_phy_link_state()
664 int auto_status = cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff, 0); in __get_marvell_phy_link_state()
698 static cvmx_helper_link_info_t __get_broadcom_phy_link_state(int phy_addr) in __get_broadcom_phy_link_state() argument
706 phy_status = cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff, 0x19); in __get_broadcom_phy_link_state()
[all …]
HDcvmx-bootmem.c738 int __cvmx_bootmem_phy_free(uint64_t phy_addr, uint64_t size, uint32_t flags) in __cvmx_bootmem_phy_free() argument
745 cvmx_dprintf("__cvmx_bootmem_phy_free addr: 0x%llx, size: 0x%llx\n", (ULL)phy_addr, (ULL)size); in __cvmx_bootmem_phy_free()
757 if (cur_addr == 0 || phy_addr < cur_addr) in __cvmx_bootmem_phy_free()
760 if (cur_addr && phy_addr + size > cur_addr) in __cvmx_bootmem_phy_free()
762 else if (phy_addr + size == cur_addr) in __cvmx_bootmem_phy_free()
765 cvmx_bootmem_phy_set_next(phy_addr, cvmx_bootmem_phy_get_next(cur_addr)); in __cvmx_bootmem_phy_free()
766 cvmx_bootmem_phy_set_size(phy_addr, cvmx_bootmem_phy_get_size(cur_addr) + size); in __cvmx_bootmem_phy_free()
767 CVMX_BOOTMEM_DESC_SET_FIELD(head_addr, phy_addr); in __cvmx_bootmem_phy_free()
773 cvmx_bootmem_phy_set_next(phy_addr, cur_addr); /* OK if cur_addr is 0 */ in __cvmx_bootmem_phy_free()
774 cvmx_bootmem_phy_set_size(phy_addr, size); in __cvmx_bootmem_phy_free()
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HDcvmx-helper-board.h130 int cvmx_helper_board_link_set_phy(int phy_addr, cvmx_helper_board_set_phy_link_flags_types_t link_…
HDcvmx-mgmt-port.c243 int phy_addr = cvmx_helper_board_get_mii_address(port_num); in cvmx_mgmt_port_initialize() local
244 if (phy_addr != -1) in cvmx_mgmt_port_initialize()
248 … phy_status.u16 = cvmx_mdio_read(phy_addr >> 8, phy_addr & 0xff, CVMX_MDIO_PHY_REG_STATUS); in cvmx_mgmt_port_initialize()
HDcvmx-bootmem.h430 int __cvmx_bootmem_phy_free(uint64_t phy_addr, uint64_t size, uint32_t flags);
/freebsd-11-stable/sys/mips/rmi/dev/xlr/
HDxgmac_mdio.h41 uint32_t phy_addr, uint32_t address);
44 uint32_t phy_addr, uint32_t address, uint32_t data);
47 uint32_t phy_addr, uint32_t dev_ad, uint32_t address);
51 uint32_t phy_addr, uint32_t dev_ad, uint32_t address) in xmdio_address() argument
59 ((phy_addr & 0x1F) << 23) | in xmdio_address()
77 uint32_t phy_addr, uint32_t address) in xmdio_read() argument
84 xmdio_address(_mmio, phy_addr, 5, address); in xmdio_read()
87 ((phy_addr & 0x1F) << 23) | in xmdio_read()
106 uint32_t phy_addr, uint32_t address, uint32_t data) in xmdio_write() argument
112 xmdio_address(_mmio, phy_addr, 5, address); in xmdio_write()
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/freebsd-11-stable/sys/dev/cxgb/common/
HDcxgb_common.h149 int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
151 int (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
584 int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
586 int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
605 int phy_addr, struct cphy_ops *phy_ops, in cphy_init() argument
609 phy->addr = (u8)phy_addr; in cphy_init()
840 int t3_mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
842 int t3_mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
845 int t3_mv88e1xxx_phy_prep(pinfo_t *pinfo, int phy_addr,
847 int t3_vsc8211_phy_prep(pinfo_t *pinfo, int phy_addr,
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HDcxgb_aq100x.c464 t3_aq100x_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_aq100x_phy_prep() argument
472 cphy_init(&pinfo->phy, adapter, pinfo, phy_addr, &aq100x_ops, mdio_ops, in t3_aq100x_phy_prep()
480 gpio = phy_addr ? F_GPIO10_OUT_VAL : F_GPIO6_OUT_VAL; in t3_aq100x_phy_prep()
497 phy_addr, err, v); in t3_aq100x_phy_prep()
507 phy_addr, v); in t3_aq100x_phy_prep()
515 CH_WARN(adapter, "PHY%d: unknown firmware %d.%d\n", phy_addr, in t3_aq100x_phy_prep()
522 phy_addr); in t3_aq100x_phy_prep()
532 "(0x%x, 0x%x).\n", phy_addr, v, v2); in t3_aq100x_phy_prep()
537 "(0x%x).\n", phy_addr, v); in t3_aq100x_phy_prep()
HDcxgb_ael1002.c344 int t3_ael1002_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_ael1002_phy_prep() argument
350 cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael1002_ops, mdio_ops, in t3_ael1002_phy_prep()
426 int t3_ael1006_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_ael1006_phy_prep() argument
431 cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael1006_ops, mdio_ops, in t3_ael1006_phy_prep()
1384 int t3_ael2005_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_ael2005_phy_prep() argument
1390 cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael2005_ops, mdio_ops, in t3_ael2005_phy_prep()
2136 int t3_ael2020_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_ael2020_phy_prep() argument
2142 cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &ael2020_ops, mdio_ops, in t3_ael2020_phy_prep()
2215 int t3_qt2045_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_qt2045_phy_prep() argument
2221 cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &qt2045_ops, mdio_ops, in t3_qt2045_phy_prep()
[all …]
HDcxgb_tn1010.c213 int t3_tn1010_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_tn1010_phy_prep() argument
216 cphy_init(&pinfo->phy, pinfo->adapter, pinfo, phy_addr, &tn1010_ops, mdio_ops, in t3_tn1010_phy_prep()
HDcxgb_mv88e1xxx.c298 int t3_mv88e1xxx_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_mv88e1xxx_phy_prep() argument
304 cphy_init(phy, pinfo->adapter, pinfo, phy_addr, &mv88e1xxx_ops, mdio_ops, in t3_mv88e1xxx_phy_prep()
HDcxgb_vsc8211.c429 int t3_vsc8211_phy_prep(pinfo_t *pinfo, int phy_addr, in t3_vsc8211_phy_prep() argument
436 cphy_init(&pinfo->phy, pinfo->adapter, pinfo, phy_addr, &vsc8211_ops, mdio_ops, in t3_vsc8211_phy_prep()
/freebsd-11-stable/sys/mips/rmi/
HDboard.c248 blk0->gmac_port[0].phy_addr = 0; in xls_board_specific_overrides()
321 blk1->gmac_port[0].phy_addr = 16; in xls_board_specific_overrides()
331 blk0->gmac_port[0].phy_addr = 0; in xls_board_specific_overrides()
350 blk1->gmac_port[0].phy_addr = 16; in xls_board_specific_overrides()
466 blk0->gmac_port[i].phy_addr = i + 16; in xlr_board_info_setup()
493 blk1->gmac_port[i].phy_addr = i + 20; in xlr_board_info_setup()
537 blk0->gmac_port[i].phy_addr = i; in xlr_board_info_setup()
561 blk1->gmac_port[0].phy_addr = 0; in xlr_board_info_setup()
581 blk2->gmac_port[0].phy_addr = 0; in xlr_board_info_setup()
HDboard.h236 uint32_t phy_addr; member
/freebsd-11-stable/sys/dev/hptiop/
HDhptiop.c837 u_int64_t phy_addr; in hptiop_send_sync_request_mv() local
840 phy_addr = hba->ctlcfgcmd_phy | in hptiop_send_sync_request_mv()
845 hptiop_mv_inbound_write(phy_addr, hba); in hptiop_send_sync_request_mv()
861 u_int64_t phy_addr; in hptiop_send_sync_request_mvfrey() local
867 phy_addr = hba->ctlcfgcmd_phy; in hptiop_send_sync_request_mvfrey()
871 | ((phy_addr >> 16) & 0xffff0000); in hptiop_send_sync_request_mvfrey()
872 reqhdr->context = ((phy_addr & 0xffffffff) << 32 ) in hptiop_send_sync_request_mvfrey()
884 hba->u.mvfrey.inlist[index].addr = phy_addr; in hptiop_send_sync_request_mvfrey()
1304 u_int64_t phy_addr; in hptiop_post_ioctl_command_mvfrey() local
1307 phy_addr = hba->ctlcfgcmd_phy; in hptiop_post_ioctl_command_mvfrey()
[all …]
/freebsd-11-stable/sys/dev/bxe/
HDbxe_elink.h212 #define ELINK_FW_PARAM_SET(phy_addr, phy_type, mdio_access) \ argument
213 (phy_addr | phy_type | mdio_access << ELINK_FW_PARAM_MDIO_CTRL_OFFSET)
530 elink_status_t elink_phy_read(struct elink_params *params, uint8_t phy_addr,
533 elink_status_t elink_phy_write(struct elink_params *params, uint8_t phy_addr,
/freebsd-11-stable/sys/dev/ixgbe/
HDixgbe_phy.c291 static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr) in ixgbe_probe_phy() argument
295 if (!ixgbe_validate_phy_addr(hw, phy_addr)) { in ixgbe_probe_phy()
297 phy_addr); in ixgbe_probe_phy()
329 u16 phy_addr; in ixgbe_identify_phy_generic() local
344 phy_addr = (hw->phy.nw_mng_if_sel & in ixgbe_identify_phy_generic()
347 if (ixgbe_probe_phy(hw, phy_addr)) in ixgbe_identify_phy_generic()
353 for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) { in ixgbe_identify_phy_generic()
354 if (ixgbe_probe_phy(hw, phy_addr)) { in ixgbe_identify_phy_generic()
404 bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr) in ixgbe_validate_phy_addr() argument
411 hw->phy.addr = phy_addr; in ixgbe_validate_phy_addr()
/freebsd-11-stable/sys/dev/e1000/
HDe1000_phy.c3059 u32 phy_addr = 0; in e1000_determine_phy_address() local
3065 for (phy_addr = 0; phy_addr < E1000_MAX_PHY_ADDR; phy_addr++) { in e1000_determine_phy_address()
3066 hw->phy.addr = phy_addr; in e1000_determine_phy_address()
3095 u32 phy_addr = 2; in e1000_get_phy_addr_for_bm_page() local
3098 phy_addr = 1; in e1000_get_phy_addr_for_bm_page()
3100 return phy_addr; in e1000_get_phy_addr_for_bm_page()
3538 u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); in __e1000_read_phy_reg_hv() local
3569 hw->phy.addr = phy_addr; in __e1000_read_phy_reg_hv()
3647 u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); in __e1000_write_phy_reg_hv() local
3694 hw->phy.addr = phy_addr; in __e1000_write_phy_reg_hv()
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/freebsd-11-stable/sys/dev/ixl/
HDi40e_common.c6196 u16 reg, u8 phy_addr, u16 *value) in i40e_read_phy_register_clause22() argument
6204 (phy_addr << I40E_GLGEN_MSCA_PHYADD_SHIFT) | in i40e_read_phy_register_clause22()
6241 u16 reg, u8 phy_addr, u16 value) in i40e_write_phy_register_clause22() argument
6252 (phy_addr << I40E_GLGEN_MSCA_PHYADD_SHIFT) | in i40e_write_phy_register_clause22()
6282 u8 page, u16 reg, u8 phy_addr, u16 *value) in i40e_read_phy_register_clause45() argument
6291 (phy_addr << I40E_GLGEN_MSCA_PHYADD_SHIFT) | in i40e_read_phy_register_clause45()
6314 (phy_addr << I40E_GLGEN_MSCA_PHYADD_SHIFT) | in i40e_read_phy_register_clause45()
6356 u8 page, u16 reg, u8 phy_addr, u16 value) in i40e_write_phy_register_clause45() argument
6365 (phy_addr << I40E_GLGEN_MSCA_PHYADD_SHIFT) | in i40e_write_phy_register_clause45()
6390 (phy_addr << I40E_GLGEN_MSCA_PHYADD_SHIFT) | in i40e_write_phy_register_clause45()
[all …]
HDi40e_prototype.h590 u16 reg, u8 phy_addr, u16 *value);
592 u16 reg, u8 phy_addr, u16 value);
594 u8 page, u16 reg, u8 phy_addr, u16 *value);
596 u8 page, u16 reg, u8 phy_addr, u16 value);
598 u8 page, u16 reg, u8 phy_addr, u16 *value);
600 u8 page, u16 reg, u8 phy_addr, u16 value);
/freebsd-11-stable/sys/mips/rmi/dev/nlge/
HDif_nlge.c209 static void release_tx_desc(vm_paddr_t phy_addr);
1636 phy = sc->phy_addr % 4 + 27; in nlge_sgmii_init()
1676 port_sc->phy_addr, 26); in nlge_intr()
1677 PDEBUG("Phy_%d: int_status=0x%08x\n", port_sc->phy_addr, in nlge_intr()
1910 nlge_mediastatus, BMSR_DEFCAPMASK, sc->phy_addr, MII_OFFSET_ANY, in nlge_mii_init()
1921 nlge_mii_write_internal(sc->mii_base, sc->phy_addr, 25, in nlge_mii_init()
2209 sc->phy_addr, MII_BMSR); in nlge_gmac_config_speed()
2217 sc->speed = nlge_mii_read_internal(sc->mii_base, sc->phy_addr, 28); in nlge_gmac_config_speed()
2267 sc->phy_addr = port_info->phy_addr; in nlge_set_port_attribs()
2270 sc->mii_base, sc->phy_addr); in nlge_set_port_attribs()
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/freebsd-11-stable/sys/dev/ixgb/
HDixgb_hw.h700 uint32_t phy_addr; /* XGMII address of Phy */ member
805 uint32_t phy_addr,
810 uint32_t phy_addr,
/freebsd-11-stable/sys/gnu/dts/arm/
HDexynos5440-sd5v1.dts38 phy_addr = <1>;
/freebsd-11-stable/sys/mips/nlm/dev/net/
HDxlpge.h104 int phy_addr; /* PHY id for the interface */ member
/freebsd-11-stable/sys/mips/nlm/
HDboard.h70 int phy_addr; member

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