| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| HD | MipsExpandPseudo.cpp | 91 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwapSubword() 92 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwapSubword() 93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword() 94 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwapSubword() 96 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwapSubword() 98 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwapSubword() 217 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwap() 218 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwap() 219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap() 220 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwap() [all …]
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| HD | MipsSubtarget.cpp | 142 if (hasMips32r6()) { in MipsSubtarget() 200 if (!hasMips32r6() && hasCRC() && !CRCWarningPrinted) { in MipsSubtarget() 205 if (!hasMips32r6() && hasGINV() && !GINVWarningPrinted) { in MipsSubtarget()
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| HD | MipsSubtarget.h | 265 bool hasMips32r6() const { in hasMips32r6() function 310 return inMicroMipsMode() && hasMips32r6(); in inMicroMips32r6Mode() 369 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
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| HD | MipsLegalizerInfo.cpp | 84 if (CheckTy0Ty1MemSizeAlign(Query, {{s32, p0, 8, ST.hasMips32r6()}, in MipsLegalizerInfo() 85 {s32, p0, 16, ST.hasMips32r6()}, in MipsLegalizerInfo() 86 {s32, p0, 32, ST.hasMips32r6()}, in MipsLegalizerInfo() 87 {p0, p0, 32, ST.hasMips32r6()}, in MipsLegalizerInfo() 88 {s64, p0, 64, ST.hasMips32r6()}})) in MipsLegalizerInfo()
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| HD | MipsBranchExpansion.cpp | 368 bool HasR6 = ABI.IsN64() ? STI->hasMips64r6() : STI->hasMips32r6(); in buildProperJumpMI() 420 STI->hasMips32r6() in expandToLongBranch() 491 if (STI->hasMips32r6()) { in expandToLongBranch() 602 if (STI->hasMips32r6()) { in expandToLongBranch() 650 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch() 734 if (!STI->hasMips32r6() || STI->inMicroMipsMode()) in handleForbiddenSlot()
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| HD | MipsSERegisterInfo.cpp | 114 if (Subtarget.hasMips32r6()) in getLoadStoreOffsetSizeInBits()
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| HD | MipsRegisterInfo.cpp | 101 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
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| HD | MipsInstrInfo.cpp | 465 if (Subtarget.hasMips32r6() && (I->getNumOperands() > 1) && in getEquivalentCompactForm() 474 if (Subtarget.hasMips32r6() || canUseShortMicroMipsCTI) { in getEquivalentCompactForm()
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| HD | MipsDelaySlotFiller.cpp | 614 !(InMicroMipsMode && STI.hasMips32r6())) { in runOnMachineBasicBlock() 669 (STI.hasMips32r6() && MipsCompactBranchPolicy != CB_Never)) && in runOnMachineBasicBlock()
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| HD | MipsISelLowering.cpp | 308 if (Subtarget.hasMips32r6()) in MipsTargetLowering() 547 !Subtarget.hasMips32r6() && !Subtarget.inMips16Mode() && in createFastISel() 1061 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performSUBCombine() 1076 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDCombine() 2025 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND() 2045 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSELECT() 2057 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSETCC()
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| HD | MicroMipsSizeReduction.cpp | 781 Subtarget->hasMips32r6()) in runOnMachineFunction()
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| HD | MipsAsmPrinter.cpp | 125 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
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| HD | MipsSEISelDAGToDAG.cpp | 1319 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
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| HD | MipsSEISelLowering.cpp | 227 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering() 410 if(!Subtarget.hasMips32r6()) in lowerSELECT() 1267 assert(!Subtarget.hasMips32r6()); in lowerMulDiv()
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| HD | MipsInstrInfo.td | 182 def HasMips32r6 : Predicate<"Subtarget->hasMips32r6()">, 184 def NotMips32r6 : Predicate<"!Subtarget->hasMips32r6()">,
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| HD | MipsABIFlagsSection.h | 98 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| HD | MipsDisassembler.cpp | 54 bool hasMips32r6() const { in hasMips32r6() function in __anond2d06e890111::MipsDisassembler 1232 if (hasMips32r6()) { in getInstruction() 1259 if (hasMips32r6()) { in getInstruction() 1317 if (hasMips32r6() && isGP64()) { in getInstruction() 1326 if (hasMips32r6() && isPTR64()) { in getInstruction() 1335 if (hasMips32r6()) { in getInstruction() 2484 if (static_cast<const MipsDisassembler*>(Decoder)->hasMips32r6()) in DecodeMovePOperands()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| HD | MipsAsmParser.cpp | 649 bool hasMips32r6() const { in hasMips32r6() function in __anon840592a90211::MipsAsmParser 1980 if (hasMips32r6() && Opcode == Mips::SSNOP) { in processInstruction() 2624 JalrInst.setOpcode(hasMips32r6() ? Mips::JALRC16_MMR6 : Mips::JALR16_MM); in expandJalWithRegs() 3559 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM); in expandUncondBranchMMPseudo() 3852 if (inMicroMipsMode() && hasMips32r6()) in expandLoadStoreMultiple() 4346 if (hasMips32r6() || hasMips64r6()) { in expandUlh() 4398 if (hasMips32r6() || hasMips64r6()) { in expandUsh() 4449 if (hasMips32r6() || hasMips64r6()) { in expandUxw()
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