Searched refs:ds_ctl22 (Results 1 – 3 of 3) sorted by relevance
300 MS(txc.ds_ctl22, AR_xmit_power3), in ar9300_decode_txdesc()301 txc.ds_ctl22 & AR_tx_ant3, in ar9300_decode_txdesc()302 MF(txc.ds_ctl22, AR_tx_ant_sel3), in ar9300_decode_txdesc()303 MS(txc.ds_ctl22, AR_ness3)); in ar9300_decode_txdesc()
634 ads->ds_ctl22 = 0; in ar9300_set_11n_tx_desc()813 ads->ds_ctl22 |= in ar9300_set_11n_rate_scenario()833 ads->ds_ctl22 |= ant; /* rateseries 3 */ in ar9300_set_11n_rate_scenario()
80 u_int32_t ds_ctl22; /* DMA control 22 */ member