Searched refs:VXGE_HAL_VPATH_INTR_TX (Results 1 – 4 of 4) sorted by relevance
1358 val64 = hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] | in vxge_hal_device_intr_enable()1374 val32 = hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] | in vxge_hal_device_intr_enable()1435 val64 = hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] | in vxge_hal_device_intr_disable()1446 val32 = hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] | in vxge_hal_device_intr_disable()2124 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) { in vxge_hal_device_mask_tx()2127 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX], in vxge_hal_device_mask_tx()2131 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX] != 0) { in vxge_hal_device_mask_tx()2134 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_TX], in vxge_hal_device_mask_tx()2166 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX] != 0) { in vxge_hal_device_clear_tx()2169 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_TX], in vxge_hal_device_clear_tx()[all …]
8829 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_TX]); in __hal_vpath_tim_configure()8899 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_TX]); in __hal_vpath_tim_configure()8905 &vpath->vp_reg->tim_cfg2_int_num[VXGE_HAL_VPATH_INTR_TX]); in __hal_vpath_tim_configure()8938 &vpath->vp_reg->tim_cfg2_int_num[VXGE_HAL_VPATH_INTR_TX]); in __hal_vpath_tim_configure()8942 &vpath->vp_reg->tim_cfg3_int_num[VXGE_HAL_VPATH_INTR_TX]); in __hal_vpath_tim_configure()8986 &vpath->vp_reg->tim_cfg3_int_num[VXGE_HAL_VPATH_INTR_TX]); in __hal_vpath_tim_configure()9670 (vp_id * VXGE_HAL_MAX_INTR_PER_VP) + VXGE_HAL_VPATH_INTR_TX; in __hal_vp_initialize()11949 &vpath->vp_reg->tim_cfg3_int_num[VXGE_HAL_VPATH_INTR_TX]); in vxge_hal_vpath_dynamic_tti_rtimer_set()12005 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_TX]); in vxge_hal_vpath_tti_ci_set()12013 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_TX]); in vxge_hal_vpath_tti_ci_set()[all …]
125 #define VXGE_HAL_INTR_TX (1<<(3-VXGE_HAL_VPATH_INTR_TX))
44 #define VXGE_HAL_VPATH_INTR_TX 0 macro