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Searched refs:UNINDEXED (Results 1 – 17 of 17) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDSelectionDAGNodes.h2211 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2214 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2315 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2318 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2606 Ld->getAddressingMode() == ISD::UNINDEXED;
2636 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
2644 St->getAddressingMode() == ISD::UNINDEXED;
2660 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
HDISDOpcodes.h986 UNINDEXED = 0, enumerator
HDBasicTTIImpl.h177 return ISD::UNINDEXED; in getISDIndexedMode()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
HDSelectionDAG.cpp6840 bool Indexed = AM != ISD::UNINDEXED; in getLoad()
6874 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad()
6881 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad()
6892 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, PtrInfo, in getExtLoad()
6900 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad()
6952 dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO)); in getStore()
6960 ISD::UNINDEXED, false, VT, MMO); in getStore()
7019 dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO)); in getTruncStore()
7027 ISD::UNINDEXED, true, SVT, MMO); in getTruncStore()
7071 bool Indexed = AM != ISD::UNINDEXED; in getMaskedLoad()
[all …]
HDLegalizeVectorTypes.cpp330 ISD::UNINDEXED, N->getExtensionType(), in ScalarizeVecRes_LOAD()
1512 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
1517 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
HDTargetLowering.cpp6679 assert(LD->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedLoad()
6831 assert(ST->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedStore()
HDSelectionDAGBuilder.cpp4353 ISD::UNINDEXED, false /* Truncating */, IsCompressing); in visitMaskedStore()
4556 ISD::UNINDEXED, ISD::NON_EXTLOAD, IsExpanding); in visitMaskedLoad()
HDDAGCombiner.cpp13805 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore()
14029 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
14121 assert(AM != ISD::UNINDEXED); in SplitIndexingFromLoad()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonISelDAGToDAG.cpp452 if (AM != ISD::UNINDEXED) { in SelectLoad()
561 if (AM != ISD::UNINDEXED) { in SelectStore()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMISelDAGToDAG.cpp1524 if (AM == ISD::UNINDEXED) in tryARMIndexedLoad()
1630 if (AM == ISD::UNINDEXED) in tryT2IndexedLoad()
1689 if (AM == ISD::UNINDEXED) in tryMVEIndexedLoad()
1705 if (AM == ISD::UNINDEXED) in tryMVEIndexedLoad()
HDARMISelLowering.cpp14078 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, BasePtr, Offset, in PerformSplittingToWideningLoad()
14081 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, NewPtr, Offset, in PerformSplittingToWideningLoad()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/
HDTargetSelectionDAG.td777 // cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
778 // cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDR600ISelLowering.cpp1636 ISD::UNINDEXED, Ext, VT, DL, Chain, in LowerFormalArguments()
HDSIISelLowering.cpp7301 SDValue NewLoad = DAG.getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, in widenLoad()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86ISelDAGToDAG.cpp774 LD->getAddressingMode() != ISD::UNINDEXED || in isCalleeLoad()
HDX86ISelLowering.cpp25017 MemVT, MemIntr->getMemOperand(), ISD::UNINDEXED, in LowerINTRINSIC_W_CHAIN()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64ISelLowering.cpp11258 ISD::UNINDEXED, ISD::NON_EXTLOAD, false); in performLDNT1Combine()
11282 ISD::UNINDEXED, false, false); in performSTNT1Combine()