| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| HD | CombinerHelper.cpp | 942 APInt SplatVal = APInt::getSplat(NumBits, Scalar); in getMemsetValue() local
943 return MIB.buildConstant(Ty, SplatVal).getReg(0); in getMemsetValue()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| HD | WebAssemblyISelLowering.cpp | 1566 SDValue SplatVal; in LowerShift() local
1568 !(SplatVal = ShiftVec->getSplatValue())) in LowerShift()
1572 auto *SplatConst = dyn_cast<ConstantSDNode>(SplatVal); in LowerShift()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 7403 SDValue SplatVal = Op.getOperand(0); in LowerSPLAT_VECTOR() local
7411 SplatVal = DAG.getAnyExtOrTrunc(SplatVal, dl, MVT::i32); in LowerSPLAT_VECTOR()
7412 return DAG.getNode(AArch64ISD::DUP, dl, VT, SplatVal); in LowerSPLAT_VECTOR()
7414 SplatVal = DAG.getAnyExtOrTrunc(SplatVal, dl, MVT::i64); in LowerSPLAT_VECTOR()
7415 return DAG.getNode(AArch64ISD::DUP, dl, VT, SplatVal); in LowerSPLAT_VECTOR()
7420 SplatVal = DAG.getAnyExtOrTrunc(SplatVal, dl, MVT::i64); in LowerSPLAT_VECTOR()
7421 SplatVal = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i64, SplatVal, in LowerSPLAT_VECTOR()
7426 DAG.getConstant(0, dl, MVT::i64), SplatVal); in LowerSPLAT_VECTOR()
11204 SDValue SplatVal, unsigned NumVecElts) { in splitStoreSplat() argument
11207 unsigned EltOffset = SplatVal.getValueType().getSizeInBits() / 8; in splitStoreSplat()
[all …]
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| HD | InstCombineVectorOps.cpp | 761 Value *SplatVal = InsElt.getOperand(1); in foldInsSequenceIntoSplat() local
770 if (!Idx || CurrIE->getOperand(1) != SplatVal) in foldInsSequenceIntoSplat()
803 FirstIE = InsertElementInst::Create(UndefVec, SplatVal, Zero, "", &InsElt); in foldInsSequenceIntoSplat()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.h | 720 bool isConstantSplat(SDValue Op, APInt &SplatVal);
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| HD | X86ISelDAGToDAG.cpp | 3915 APInt SplatVal; in combineIncDecVector() local
3916 if (!X86::isConstantSplat(OneVec, SplatVal) || !SplatVal.isOneValue()) in combineIncDecVector()
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| HD | X86ISelLowering.cpp | 6471 bool isConstantSplat(SDValue Op, APInt &SplatVal) { in isConstantSplat() argument
6487 SplatVal = EltBits[SplatIndex]; in isConstantSplat()
28828 APInt SplatVal; in ReplaceNodeResults() local
28829 if (ISD::isConstantSplatVector(N->getOperand(1).getNode(), SplatVal)) { in ReplaceNodeResults()
28835 SDValue N1 = DAG.getConstant(SplatVal, dl, ResVT); in ReplaceNodeResults()
40012 APInt SplatVal; in combineAndMaskToShift() local
40013 if (!ISD::isConstantSplatVector(Op1.getNode(), SplatVal) || in combineAndMaskToShift()
40014 !SplatVal.isMask()) in combineAndMaskToShift()
40029 unsigned ShiftVal = SplatVal.countTrailingOnes(); in combineAndMaskToShift()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeIntegerTypes.cpp | 4300 SDValue SplatVal = N->getOperand(0); in PromoteIntRes_SPLAT_VECTOR() local
4302 assert(!SplatVal.getValueType().isVector() && "Input must be a scalar"); in PromoteIntRes_SPLAT_VECTOR()
4309 SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutElemVT, SplatVal); in PromoteIntRes_SPLAT_VECTOR()
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| HD | LegalizeDAG.cpp | 2020 SDValue SplatVal = Node->getOperand(0); in ExpandSPLAT_VECTOR() local
2022 return DAG.getSplatBuildVector(VT, DL, SplatVal); in ExpandSPLAT_VECTOR()
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| HD | SelectionDAG.cpp | 139 bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) { in isConstantSplatVector() argument
148 return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs, in isConstantSplatVector()
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