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Searched refs:Reg16 (Results 1 – 8 of 8) sorted by relevance

/freebsd-11-stable/contrib/binutils/opcodes/
HDi386-reg.tbl31 ax, Reg16|Acc, 0, 0
32 cx, Reg16, 0, 1
33 dx, Reg16|InOutPortReg, 0, 2
34 bx, Reg16|BaseIndex, 0, 3
35 sp, Reg16, 0, 4
36 bp, Reg16|BaseIndex, 0, 5
37 si, Reg16|BaseIndex, 0, 6
38 di, Reg16|BaseIndex, 0, 7
39 r8w, Reg16, RegRex, 0
40 r9w, Reg16, RegRex, 1
[all …]
HDi386-tbl.h17 { Reg8|Reg16|Reg32|Reg64,
18 Reg8|Reg16|Reg32|Reg64|BaseIndex|Disp8|Disp16|Disp32|Disp32S } },
22 Reg8|Reg16|Reg32 } },
26 Reg8|Reg16|Reg32|Reg64|BaseIndex|Disp8|Disp16|Disp32|Disp32S } },
34 Reg16|Reg32|Reg64|RegMem } },
42 Reg16|Reg32|Reg64|RegMem } },
49 { Reg16|Reg32|Reg64,
57 { Reg16|Reg32|Reg64,
98 Reg16 } },
101 { Reg16|BaseIndex|Disp8|Disp16|Disp32|Disp32S,
[all …]
HDi386-opc.tbl8 mov, 2, 0x88, None, 0, D|W|Modrm|No_sSuf|No_xSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|…
11 mov, 2, 0xb0, None, 0, W|ShortForm|No_sSuf|No_qSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|R…
12 mov, 2, 0xc6, 0x0, 0, W|Modrm|No_sSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Ba…
19 mov, 2, 0x8c, None, 0, Modrm|No_bSuf|No_sSuf|No_qSuf|No_xSuf, { SReg2, Reg16|Reg32|Reg64|RegMem }
21 mov, 2, 0x8c, None, Cpu386, Modrm|No_bSuf|No_sSuf|No_qSuf|No_xSuf, { SReg3, Reg16|Reg32|Reg64|RegMe…
23 mov, 2, 0x8e, None, 0, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf|No_xSuf, { Reg16|Reg32|Reg64, SReg2…
25 mov, 2, 0x8e, None, Cpu386, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf|No_xSuf, { Reg16|Reg32|Reg64, …
41 …bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Reg8|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16 }
42 movswl, 2, 0xfbf, None, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Reg16|Base…
44 movswq, 2, 0xfbf, None, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|Rex64, { Reg16…
[all …]
HDi386-opc.h147 #define Reg16 0x2 /* 16 bit reg */ macro
194 #define Reg (Reg8|Reg16|Reg32|Reg64) /* gen'l register */
195 #define WordReg (Reg16|Reg32|Reg64)
/freebsd-11-stable/contrib/binutils/gas/config/
HDtc-i386.c1442 { Reg16, "r16" },
2337 else if (i.types[op] & Reg16) in optimize_imm()
2847 i.suffix = ((i.types[0] & Reg16) ? WORD_MNEM_SUFFIX : in process_suffix()
2874 (i.types[op] & Reg16) ? WORD_MNEM_SUFFIX : in process_suffix()
2994 (flag_code == CODE_32BIT ? Reg16 : Reg32)) in process_suffix()
3080 (i.op[op].regs + (i.types[op] & Reg16 in check_byte_reg()
3115 && (i.tm.operand_types[op] & (Reg16 | Reg32 | Acc)) != 0) in check_long_reg()
3126 && (i.types[op] & Reg16) != 0 in check_long_reg()
3169 && (i.tm.operand_types[op] & (Reg16 | Reg32 | Acc)) != 0) in check_qword_reg()
3179 else if (((i.types[op] & Reg16) != 0 in check_qword_reg()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-pdbutil/
HDMinimalSymbolDumper.cpp317 static std::string formatRegisterId(uint16_t Reg16, CPUType Cpu) { in formatRegisterId() argument
318 return formatRegisterId(RegisterId(Reg16), Cpu); in formatRegisterId()
321 static std::string formatRegisterId(ulittle16_t &Reg16, CPUType Cpu) { in formatRegisterId() argument
322 return formatRegisterId(uint16_t(Reg16), Cpu); in formatRegisterId()
/freebsd-11-stable/contrib/binutils/include/opcode/
HDChangeLog-91031629 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
/freebsd-11-stable/contrib/binutils/gas/
HDChangeLog-96974733 Reg8 and Reg16 rather than requiring the type to be exactly Reg8
4734 or Reg16.