| /freebsd-11-stable/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| HD | RandomIRBuilder.cpp | 56 auto *NewLoad = new LoadInst( in newSource() local 60 if (Pred.matches(Srcs, NewLoad)) in newSource() 61 RS.sample(NewLoad, RS.totalWeight()); in newSource() 63 NewLoad->eraseFromParent(); in newSource()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| HD | InstCombineLoadStoreAlloca.cpp | 472 LoadInst *NewLoad = Builder.CreateAlignedLoad( in combineLoadToNewType() local 474 NewLoad->setAtomic(LI.getOrdering(), LI.getSyncScopeID()); in combineLoadToNewType() 475 copyMetadataForLoad(*NewLoad, LI); in combineLoadToNewType() 476 return NewLoad; in combineLoadToNewType() 610 LoadInst *NewLoad = IC.combineLoadToNewType( in combineLoadToOperationType() local 616 combineStoreToNewValue(IC, *SI, NewLoad); in combineLoadToOperationType() 633 LoadInst *NewLoad = IC.combineLoadToNewType(LI, CI->getDestTy()); in combineLoadToOperationType() local 634 CI->replaceAllUsesWith(NewLoad); in combineLoadToOperationType() 661 LoadInst *NewLoad = IC.combineLoadToNewType(LI, ST->getTypeAtIndex(0U), in unpackLoadToAggregate() local 665 NewLoad->setAAMetadata(AAMD); in unpackLoadToAggregate() [all …]
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| HD | VNCoercion.cpp | 432 LoadInst *NewLoad = Builder.CreateLoad(DestTy, PtrVal); in getLoadValueForLoad() local 433 NewLoad->takeName(SrcVal); in getLoadValueForLoad() 434 NewLoad->setAlignment(MaybeAlign(SrcVal->getAlignment())); in getLoadValueForLoad() 437 LLVM_DEBUG(dbgs() << "TO: " << *NewLoad << "\n"); in getLoadValueForLoad() 441 Value *RV = NewLoad; in getLoadValueForLoad() 447 SrcVal = NewLoad; in getLoadValueForLoad()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| HD | GVN.cpp | 1246 auto *NewLoad = new LoadInst( in PerformLoadPRE() local 1250 NewLoad->setDebugLoc(LI->getDebugLoc()); in PerformLoadPRE() 1256 NewLoad->setAAMetadata(Tags); in PerformLoadPRE() 1259 NewLoad->setMetadata(LLVMContext::MD_invariant_load, MD); in PerformLoadPRE() 1261 NewLoad->setMetadata(LLVMContext::MD_invariant_group, InvGroupMD); in PerformLoadPRE() 1263 NewLoad->setMetadata(LLVMContext::MD_range, RangeMD); in PerformLoadPRE() 1273 NewLoad)); in PerformLoadPRE() 1275 LLVM_DEBUG(dbgs() << "GVN INSERTED " << *NewLoad << '\n'); in PerformLoadPRE()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86AvoidStoreForwardingBlocks.cpp | 397 MachineInstr *NewLoad = in buildCopy() local 408 getBaseOperand(NewLoad).setIsKill(false); in buildCopy() 409 LLVM_DEBUG(NewLoad->dump()); in buildCopy()
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| HD | X86InterleavedAccess.cpp | 218 Instruction *NewLoad = in decompose() local 220 DecomposedVectors.push_back(NewLoad); in decompose()
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| HD | X86ISelLowering.cpp | 28329 SDValue NewLoad = DAG.getMaskedLoad( in LowerMLOAD() local 28335 SDValue Select = DAG.getNode(ISD::VSELECT, dl, MaskVT, Mask, NewLoad, in LowerMLOAD() 28337 return DAG.getMergeValues({ Select, NewLoad.getValue(1) }, dl); in LowerMLOAD() 28367 SDValue NewLoad = DAG.getMaskedLoad( in LowerMLOAD() local 28373 NewLoad.getValue(0), in LowerMLOAD() 28375 SDValue RetOps[] = {Exract, NewLoad.getValue(1)}; in LowerMLOAD()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64LegalizerInfo.cpp | 716 auto NewLoad = MIRBuilder.buildLoad(NewReg, MI.getOperand(1).getReg(), MMO); in legalizeLoadStore() local 717 MIRBuilder.buildBitcast({ValReg}, {NewLoad}); in legalizeLoadStore()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeDAG.cpp | 1341 SDValue NewLoad; in ExpandExtractFromVectorThroughStack() local 1344 NewLoad = in ExpandExtractFromVectorThroughStack() 1347 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr, in ExpandExtractFromVectorThroughStack() 1352 DAG.ReplaceAllUsesOfValueWith(Ch, SDValue(NewLoad.getNode(), 1)); in ExpandExtractFromVectorThroughStack() 1356 SmallVector<SDValue, 6> NewLoadOperands(NewLoad->op_begin(), in ExpandExtractFromVectorThroughStack() 1357 NewLoad->op_end()); in ExpandExtractFromVectorThroughStack() 1359 NewLoad = in ExpandExtractFromVectorThroughStack() 1360 SDValue(DAG.UpdateNodeOperands(NewLoad.getNode(), NewLoadOperands), 0); in ExpandExtractFromVectorThroughStack() 1361 return NewLoad; in ExpandExtractFromVectorThroughStack()
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| HD | DAGCombiner.cpp | 5034 SDValue NewLoad = ReduceLoadWidth(And.getNode()); in BackwardsPropagateMask() local 5035 assert(NewLoad && in BackwardsPropagateMask() 5037 CombineTo(Load, NewLoad, NewLoad.getValue(1)); in BackwardsPropagateMask() 5321 SDValue NewLoad(Load, 0); in visitAND() local 5324 CombineTo(N, (N0.getNode() == Load) ? NewLoad : N0); in visitAND() 5327 NewLoad = DAG.getLoad(Load->getAddressingMode(), ISD::ZEXTLOAD, in visitAND() 5335 SDValue To[] = { NewLoad.getValue(0), NewLoad.getValue(1), in visitAND() 5336 NewLoad.getValue(2) }; in visitAND() 5339 CombineTo(Load, NewLoad.getValue(0), NewLoad.getValue(1)); in visitAND() 6916 SDValue NewLoad = DAG.getExtLoad(NeedsZext ? ISD::ZEXTLOAD : ISD::NON_EXTLOAD, in MatchLoadCombine() local [all …]
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| HD | TargetLowering.cpp | 3349 SDValue NewLoad = DAG.getLoad( in SimplifySetCC() local 3353 DAG.getNode(ISD::AND, dl, newVT, NewLoad, in SimplifySetCC()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| HD | LoopVectorize.cpp | 2247 Instruction *NewLoad; in vectorizeInterleaveGroup() local 2263 NewLoad = in vectorizeInterleaveGroup() 2268 NewLoad = Builder.CreateAlignedLoad(VecTy, AddrParts[Part], in vectorizeInterleaveGroup() 2270 Group->addMetadata(NewLoad); in vectorizeInterleaveGroup() 2271 NewLoads.push_back(NewLoad); in vectorizeInterleaveGroup()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | R600ISelLowering.cpp | 1505 SDValue NewLoad = DAG.getExtLoad( in LowerLOAD() local 1508 SDValue Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, NewLoad, in LowerLOAD()
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| HD | AMDGPUISelLowering.cpp | 2917 SDValue NewLoad in performLoadCombine() local 2921 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad); in performLoadCombine() 2922 DCI.CombineTo(N, BC, NewLoad.getValue(1)); in performLoadCombine()
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| HD | SIISelLowering.cpp | 7301 SDValue NewLoad = DAG.getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, in widenLoad() local 7317 SDValue Cvt = NewLoad; in widenLoad() 7319 Cvt = DAG.getNode(ISD::SIGN_EXTEND_INREG, SL, MVT::i32, NewLoad, in widenLoad() 7323 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad() 7341 return DAG.getMergeValues({ Cvt, NewLoad.getValue(1) }, SL); in widenLoad()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| HD | SystemZISelLowering.cpp | 3274 SDValue NewLoad = DAG.getLoad(ResVT, DL, LoadN->getChain(), in lowerBITCAST() local 3277 DAG.ReplaceAllUsesOfValueWith(SDValue(LoadN, 1), NewLoad.getValue(1)); in lowerBITCAST() 3278 return NewLoad; in lowerBITCAST()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.cpp | 9154 SDValue NewLoad = DAG.getMaskedLoad( in LowerMLOAD() local 9158 SDValue Combo = NewLoad; in LowerMLOAD() 9162 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD() 9163 return DAG.getMergeValues({Combo, NewLoad.getValue(1)}, dl); in LowerMLOAD() 14131 if (SDValue NewLoad = PerformSplittingToWideningLoad(N, DAG)) in PerformExtendCombine() local 14132 return NewLoad; in PerformExtendCombine()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| HD | PPCISelLowering.cpp | 10421 SDValue NewLoad[2]; in LowerFP_EXTEND() local 10430 NewLoad[i] = DAG.getMemIntrinsicNode( in LowerFP_EXTEND() 10435 DAG.getNode(Op0.getOpcode(), SDLoc(Op0), MVT::v4f32, NewLoad[0], in LowerFP_EXTEND() 10436 NewLoad[1], Op0.getNode()->getFlags()); in LowerFP_EXTEND()
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