1 /*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2016 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD$
31 */
32
33 #ifndef _MPRVAR_H
34 #define _MPRVAR_H
35
36 #define MPR_DRIVER_VERSION "18.03.00.00-fbsd"
37
38 #define MPR_DB_MAX_WAIT 2500
39
40 #define MPR_REQ_FRAMES 1024
41 #define MPR_PRI_REQ_FRAMES 128
42 #define MPR_EVT_REPLY_FRAMES 32
43 #define MPR_REPLY_FRAMES MPR_REQ_FRAMES
44 #define MPR_CHAIN_FRAMES 2048
45 #define MPR_MAXIO_PAGES (-1)
46 #define MPR_SENSE_LEN SSD_FULL_SIZE
47 #define MPR_MSI_COUNT 1
48 #define MPR_SGE64_SIZE 12
49 #define MPR_SGE32_SIZE 8
50 #define MPR_SGC_SIZE 8
51 #define MPR_DEFAULT_CHAIN_SEG_SIZE 8
52 #define MPR_MAX_CHAIN_ELEMENT_SIZE 16
53
54 /*
55 * PCIe NVMe Specific defines
56 */
57 //SLM-for now just use the same value as a SAS disk
58 #define NVME_QDEPTH MPR_REQ_FRAMES
59 #define PRP_ENTRY_SIZE 8
60 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */
61 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */
62 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
63 #define HOST_PAGE_SIZE_4K 12
64
65 #define MPR_FUNCTRACE(sc) \
66 mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
67
68 #define CAN_SLEEP 1
69 #define NO_SLEEP 0
70
71 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
72 #define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */
73 #define MPR_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */
74
75 #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810
76
77 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002)
78 #define MPR_STRING_LENGTH 64
79
80 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */
81
82 #include <sys/endian.h>
83
84 /*
85 * host mapping related macro definitions
86 */
87 #define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF
88 #define MPR_DPM_BAD_IDX 0xFFFF
89 #define MPR_ENCTABLE_BAD_IDX 0xFF
90 #define MPR_MAX_MISSING_COUNT 0x0F
91 #define MPR_DEV_RESERVED 0x20000000
92 #define MPR_MAP_IN_USE 0x10000000
93 #define MPR_MAP_BAD_ID 0xFFFFFFFF
94
95 typedef uint8_t u8;
96 typedef uint16_t u16;
97 typedef uint32_t u32;
98 typedef uint64_t u64;
99
100 /**
101 * struct dev_mapping_table - device mapping information
102 * @physical_id: SAS address for drives or WWID for RAID volumes
103 * @device_info: bitfield provides detailed info about the device
104 * @phy_bits: bitfields indicating controller phys
105 * @dpm_entry_num: index of this device in device persistent map table
106 * @dev_handle: device handle for the device pointed by this entry
107 * @id: target id
108 * @missing_count: number of times the device not detected by driver
109 * @hide_flag: Hide this physical disk/not (foreign configuration)
110 * @init_complete: Whether the start of the day checks completed or not
111 * @TLR_bits: Turn TLR support on or off
112 */
113 struct dev_mapping_table {
114 u64 physical_id;
115 u32 device_info;
116 u32 phy_bits;
117 u16 dpm_entry_num;
118 u16 dev_handle;
119 u16 reserved1;
120 u16 id;
121 u8 missing_count;
122 u8 init_complete;
123 u8 TLR_bits;
124 u8 reserved2;
125 };
126
127 /**
128 * struct enc_mapping_table - mapping information about an enclosure
129 * @enclosure_id: Logical ID of this enclosure
130 * @start_index: index to the entry in dev_mapping_table
131 * @phy_bits: bitfields indicating controller phys
132 * @dpm_entry_num: index of this enclosure in device persistent map table
133 * @enc_handle: device handle for the enclosure pointed by this entry
134 * @num_slots: number of slots in the enclosure
135 * @start_slot: Starting slot id
136 * @missing_count: number of times the device not detected by driver
137 * @removal_flag: used to mark the device for removal
138 * @skip_search: used as a flag to include/exclude enclosure for search
139 * @init_complete: Whether the start of the day checks completed or not
140 */
141 struct enc_mapping_table {
142 u64 enclosure_id;
143 u32 start_index;
144 u32 phy_bits;
145 u16 dpm_entry_num;
146 u16 enc_handle;
147 u16 num_slots;
148 u16 start_slot;
149 u8 missing_count;
150 u8 removal_flag;
151 u8 skip_search;
152 u8 init_complete;
153 };
154
155 /**
156 * struct map_removal_table - entries to be removed from mapping table
157 * @dpm_entry_num: index of this device in device persistent map table
158 * @dev_handle: device handle for the device pointed by this entry
159 */
160 struct map_removal_table{
161 u16 dpm_entry_num;
162 u16 dev_handle;
163 };
164
165 typedef struct mpr_fw_diagnostic_buffer {
166 size_t size;
167 uint8_t extended_type;
168 uint8_t buffer_type;
169 uint8_t force_release;
170 uint32_t product_specific[23];
171 uint8_t immediate;
172 uint8_t enabled;
173 uint8_t valid_data;
174 uint8_t owned_by_firmware;
175 uint32_t unique_id;
176 } mpr_fw_diagnostic_buffer_t;
177
178 struct mpr_softc;
179 struct mpr_command;
180 struct mprsas_softc;
181 union ccb;
182 struct mprsas_target;
183 struct mpr_column_map;
184
185 MALLOC_DECLARE(M_MPR);
186
187 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
188 MPI2_EVENT_NOTIFICATION_REPLY *reply);
189 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
190
191 struct mpr_chain {
192 TAILQ_ENTRY(mpr_chain) chain_link;
193 void *chain;
194 uint64_t chain_busaddr;
195 };
196
197 struct mpr_prp_page {
198 TAILQ_ENTRY(mpr_prp_page) prp_page_link;
199 uint64_t *prp_page;
200 uint64_t prp_page_busaddr;
201 };
202
203 /*
204 * This needs to be at least 2 to support SMP passthrough.
205 */
206 #define MPR_IOVEC_COUNT 2
207
208 struct mpr_command {
209 TAILQ_ENTRY(mpr_command) cm_link;
210 TAILQ_ENTRY(mpr_command) cm_recovery;
211 struct mpr_softc *cm_sc;
212 union ccb *cm_ccb;
213 void *cm_data;
214 u_int cm_length;
215 u_int cm_out_len;
216 struct uio cm_uio;
217 struct iovec cm_iovec[MPR_IOVEC_COUNT];
218 u_int cm_max_segs;
219 u_int cm_sglsize;
220 void *cm_sge;
221 uint8_t *cm_req;
222 uint8_t *cm_reply;
223 uint32_t cm_reply_data;
224 mpr_command_callback_t *cm_complete;
225 void *cm_complete_data;
226 struct mprsas_target *cm_targ;
227 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
228 u_int cm_lun;
229 u_int cm_flags;
230 #define MPR_CM_FLAGS_POLLED (1 << 0)
231 #define MPR_CM_FLAGS_COMPLETE (1 << 1)
232 #define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2)
233 #define MPR_CM_FLAGS_DATAOUT (1 << 3)
234 #define MPR_CM_FLAGS_DATAIN (1 << 4)
235 #define MPR_CM_FLAGS_WAKEUP (1 << 5)
236 #define MPR_CM_FLAGS_USE_UIO (1 << 6)
237 #define MPR_CM_FLAGS_SMP_PASS (1 << 7)
238 #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8)
239 #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED
240 #define MPR_CM_FLAGS_USE_CCB (1 << 9)
241 #define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10)
242 u_int cm_state;
243 #define MPR_CM_STATE_FREE 0
244 #define MPR_CM_STATE_BUSY 1
245 #define MPR_CM_STATE_TIMEDOUT 2
246 bus_dmamap_t cm_dmamap;
247 struct scsi_sense_data *cm_sense;
248 uint64_t *nvme_error_response;
249 TAILQ_HEAD(, mpr_chain) cm_chain_list;
250 TAILQ_HEAD(, mpr_prp_page) cm_prp_page_list;
251 uint32_t cm_req_busaddr;
252 bus_addr_t cm_sense_busaddr;
253 struct callout cm_callout;
254 };
255
256 struct mpr_column_map {
257 uint16_t dev_handle;
258 uint8_t phys_disk_num;
259 };
260
261 struct mpr_event_handle {
262 TAILQ_ENTRY(mpr_event_handle) eh_list;
263 mpr_evt_callback_t *callback;
264 void *data;
265 uint8_t mask[16];
266 };
267
268 struct mpr_softc {
269 device_t mpr_dev;
270 struct cdev *mpr_cdev;
271 u_int mpr_flags;
272 #define MPR_FLAGS_INTX (1 << 0)
273 #define MPR_FLAGS_MSI (1 << 1)
274 #define MPR_FLAGS_BUSY (1 << 2)
275 #define MPR_FLAGS_SHUTDOWN (1 << 3)
276 #define MPR_FLAGS_DIAGRESET (1 << 4)
277 #define MPR_FLAGS_ATTACH_DONE (1 << 5)
278 #define MPR_FLAGS_GEN35_IOC (1 << 6)
279 #define MPR_FLAGS_REALLOCATED (1 << 7)
280 u_int mpr_debug;
281 u_int disable_msix;
282 u_int disable_msi;
283 int msi_msgs;
284 u_int atomic_desc_capable;
285 int tm_cmds_active;
286 int io_cmds_active;
287 int io_cmds_highwater;
288 int chain_free;
289 int max_chains;
290 int max_io_pages;
291 u_int maxio;
292 int chain_free_lowwater;
293 uint32_t chain_frame_size;
294 uint16_t chain_seg_size;
295 int prp_buffer_size;
296 int prp_pages_free;
297 int prp_pages_free_lowwater;
298 u_int enable_ssu;
299 int spinup_wait_time;
300 int use_phynum;
301 uint64_t chain_alloc_fail;
302 uint64_t prp_page_alloc_fail;
303 struct sysctl_ctx_list sysctl_ctx;
304 struct sysctl_oid *sysctl_tree;
305 char fw_version[16];
306 struct mpr_command *commands;
307 struct mpr_chain *chains;
308 struct mpr_prp_page *prps;
309 struct callout periodic;
310 struct callout device_check_callout;
311
312 struct mprsas_softc *sassc;
313 char tmp_string[MPR_STRING_LENGTH];
314 TAILQ_HEAD(, mpr_command) req_list;
315 TAILQ_HEAD(, mpr_command) high_priority_req_list;
316 TAILQ_HEAD(, mpr_chain) chain_list;
317 TAILQ_HEAD(, mpr_prp_page) prp_page_list;
318 TAILQ_HEAD(, mpr_command) tm_list;
319 int replypostindex;
320 int replyfreeindex;
321
322 struct resource *mpr_regs_resource;
323 bus_space_handle_t mpr_bhandle;
324 bus_space_tag_t mpr_btag;
325 int mpr_regs_rid;
326
327 bus_dma_tag_t mpr_parent_dmat;
328 bus_dma_tag_t buffer_dmat;
329
330 MPI2_IOC_FACTS_REPLY *facts;
331 int num_reqs;
332 int num_prireqs;
333 int num_replies;
334 int fqdepth; /* Free queue */
335 int pqdepth; /* Post queue */
336
337 uint8_t event_mask[16];
338 TAILQ_HEAD(, mpr_event_handle) event_list;
339 struct mpr_event_handle *mpr_log_eh;
340
341 struct mtx mpr_mtx;
342 struct intr_config_hook mpr_ich;
343 struct resource *mpr_irq[MPR_MSI_COUNT];
344 void *mpr_intrhand[MPR_MSI_COUNT];
345 int mpr_irq_rid[MPR_MSI_COUNT];
346
347 uint8_t *req_frames;
348 bus_addr_t req_busaddr;
349 bus_dma_tag_t req_dmat;
350 bus_dmamap_t req_map;
351
352 uint8_t *reply_frames;
353 bus_addr_t reply_busaddr;
354 bus_dma_tag_t reply_dmat;
355 bus_dmamap_t reply_map;
356
357 struct scsi_sense_data *sense_frames;
358 bus_addr_t sense_busaddr;
359 bus_dma_tag_t sense_dmat;
360 bus_dmamap_t sense_map;
361
362 uint8_t *chain_frames;
363 bus_addr_t chain_busaddr;
364 bus_dma_tag_t chain_dmat;
365 bus_dmamap_t chain_map;
366
367 uint8_t *prp_pages;
368 bus_addr_t prp_page_busaddr;
369 bus_dma_tag_t prp_page_dmat;
370 bus_dmamap_t prp_page_map;
371
372 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
373 bus_addr_t post_busaddr;
374 uint32_t *free_queue;
375 bus_addr_t free_busaddr;
376 bus_dma_tag_t queues_dmat;
377 bus_dmamap_t queues_map;
378
379 uint8_t *fw_diag_buffer;
380 bus_addr_t fw_diag_busaddr;
381 bus_dma_tag_t fw_diag_dmat;
382 bus_dmamap_t fw_diag_map;
383
384 uint8_t ir_firmware;
385
386 /* static config pages */
387 Mpi2IOCPage8_t ioc_pg8;
388 Mpi2IOUnitPage8_t iounit_pg8;
389
390 /* host mapping support */
391 struct dev_mapping_table *mapping_table;
392 struct enc_mapping_table *enclosure_table;
393 struct map_removal_table *removal_table;
394 uint8_t *dpm_entry_used;
395 uint8_t *dpm_flush_entry;
396 Mpi2DriverMappingPage0_t *dpm_pg0;
397 uint16_t max_devices;
398 uint16_t max_enclosures;
399 uint16_t max_expanders;
400 uint8_t max_volumes;
401 uint8_t num_enc_table_entries;
402 uint8_t num_rsvd_entries;
403 uint16_t max_dpm_entries;
404 uint8_t is_dpm_enable;
405 uint8_t track_mapping_events;
406 uint32_t pending_map_events;
407
408 /* FW diag Buffer List */
409 mpr_fw_diagnostic_buffer_t
410 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
411
412 /* Event Recording IOCTL support */
413 uint32_t events_to_record[4];
414 mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE];
415 uint8_t event_index;
416 uint32_t event_number;
417
418 /* EEDP and TLR support */
419 uint8_t eedp_enabled;
420 uint8_t control_TLR;
421
422 /* Shutdown Event Handler */
423 eventhandler_tag shutdown_eh;
424
425 /* To track topo events during reset */
426 #define MPR_DIAG_RESET_TIMEOUT 300000
427 uint8_t wait_for_port_enable;
428 uint8_t port_enable_complete;
429 uint8_t msleep_fake_chan;
430
431 /* StartStopUnit command handling at shutdown */
432 uint32_t SSU_refcount;
433 uint8_t SSU_started;
434
435 char exclude_ids[80];
436 struct timeval lastfail;
437 };
438
439 struct mpr_config_params {
440 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
441 u_int action;
442 u_int page_address; /* Attributes, not a phys address */
443 u_int status;
444 void *buffer;
445 u_int length;
446 int timeout;
447 void (*callback)(struct mpr_softc *, struct mpr_config_params *);
448 void *cbdata;
449 };
450
451 struct scsi_read_capacity_eedp
452 {
453 uint8_t addr[8];
454 uint8_t length[4];
455 uint8_t protect;
456 };
457
458 static __inline uint32_t
mpr_regread(struct mpr_softc * sc,uint32_t offset)459 mpr_regread(struct mpr_softc *sc, uint32_t offset)
460 {
461 return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset));
462 }
463
464 static __inline void
mpr_regwrite(struct mpr_softc * sc,uint32_t offset,uint32_t val)465 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
466 {
467 bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
468 }
469
470 /* free_queue must have Little Endian address
471 * TODO- cm_reply_data is unwanted. We can remove it.
472 * */
473 static __inline void
mpr_free_reply(struct mpr_softc * sc,uint32_t busaddr)474 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
475 {
476 if (++sc->replyfreeindex >= sc->fqdepth)
477 sc->replyfreeindex = 0;
478 sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
479 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
480 }
481
482 static __inline struct mpr_chain *
mpr_alloc_chain(struct mpr_softc * sc)483 mpr_alloc_chain(struct mpr_softc *sc)
484 {
485 struct mpr_chain *chain;
486
487 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
488 TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
489 sc->chain_free--;
490 if (sc->chain_free < sc->chain_free_lowwater)
491 sc->chain_free_lowwater = sc->chain_free;
492 } else
493 sc->chain_alloc_fail++;
494 return (chain);
495 }
496
497 static __inline void
mpr_free_chain(struct mpr_softc * sc,struct mpr_chain * chain)498 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
499 {
500 #if 0
501 bzero(chain->chain, 128);
502 #endif
503 sc->chain_free++;
504 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
505 }
506
507 static __inline struct mpr_prp_page *
mpr_alloc_prp_page(struct mpr_softc * sc)508 mpr_alloc_prp_page(struct mpr_softc *sc)
509 {
510 struct mpr_prp_page *prp_page;
511
512 if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) {
513 TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link);
514 sc->prp_pages_free--;
515 if (sc->prp_pages_free < sc->prp_pages_free_lowwater)
516 sc->prp_pages_free_lowwater = sc->prp_pages_free;
517 } else
518 sc->prp_page_alloc_fail++;
519 return (prp_page);
520 }
521
522 static __inline void
mpr_free_prp_page(struct mpr_softc * sc,struct mpr_prp_page * prp_page)523 mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page)
524 {
525 sc->prp_pages_free++;
526 TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link);
527 }
528
529 static __inline void
mpr_free_command(struct mpr_softc * sc,struct mpr_command * cm)530 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
531 {
532 struct mpr_chain *chain, *chain_temp;
533 struct mpr_prp_page *prp_page, *prp_page_temp;
534
535 if (cm->cm_reply != NULL)
536 mpr_free_reply(sc, cm->cm_reply_data);
537 cm->cm_reply = NULL;
538 cm->cm_flags = 0;
539 cm->cm_complete = NULL;
540 cm->cm_complete_data = NULL;
541 cm->cm_ccb = NULL;
542 cm->cm_targ = NULL;
543 cm->cm_max_segs = 0;
544 cm->cm_lun = 0;
545 cm->cm_state = MPR_CM_STATE_FREE;
546 cm->cm_data = NULL;
547 cm->cm_length = 0;
548 cm->cm_out_len = 0;
549 cm->cm_sglsize = 0;
550 cm->cm_sge = NULL;
551
552 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
553 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
554 mpr_free_chain(sc, chain);
555 }
556 TAILQ_FOREACH_SAFE(prp_page, &cm->cm_prp_page_list, prp_page_link,
557 prp_page_temp) {
558 TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link);
559 mpr_free_prp_page(sc, prp_page);
560 }
561 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
562 }
563
564 static __inline struct mpr_command *
mpr_alloc_command(struct mpr_softc * sc)565 mpr_alloc_command(struct mpr_softc *sc)
566 {
567 struct mpr_command *cm;
568
569 cm = TAILQ_FIRST(&sc->req_list);
570 if (cm == NULL)
571 return (NULL);
572
573 TAILQ_REMOVE(&sc->req_list, cm, cm_link);
574 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy "
575 "command\n"));
576 cm->cm_state = MPR_CM_STATE_BUSY;
577 return (cm);
578 }
579
580 static __inline void
mpr_free_high_priority_command(struct mpr_softc * sc,struct mpr_command * cm)581 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
582 {
583 struct mpr_chain *chain, *chain_temp;
584
585 if (cm->cm_reply != NULL)
586 mpr_free_reply(sc, cm->cm_reply_data);
587 cm->cm_reply = NULL;
588 cm->cm_flags = 0;
589 cm->cm_complete = NULL;
590 cm->cm_complete_data = NULL;
591 cm->cm_ccb = NULL;
592 cm->cm_targ = NULL;
593 cm->cm_lun = 0;
594 cm->cm_state = MPR_CM_STATE_FREE;
595 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
596 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
597 mpr_free_chain(sc, chain);
598 }
599 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
600 }
601
602 static __inline struct mpr_command *
mpr_alloc_high_priority_command(struct mpr_softc * sc)603 mpr_alloc_high_priority_command(struct mpr_softc *sc)
604 {
605 struct mpr_command *cm;
606
607 cm = TAILQ_FIRST(&sc->high_priority_req_list);
608 if (cm == NULL)
609 return (NULL);
610
611 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
612 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy "
613 "command\n"));
614 cm->cm_state = MPR_CM_STATE_BUSY;
615 return (cm);
616 }
617
618 static __inline void
mpr_lock(struct mpr_softc * sc)619 mpr_lock(struct mpr_softc *sc)
620 {
621 mtx_lock(&sc->mpr_mtx);
622 }
623
624 static __inline void
mpr_unlock(struct mpr_softc * sc)625 mpr_unlock(struct mpr_softc *sc)
626 {
627 mtx_unlock(&sc->mpr_mtx);
628 }
629
630 #define MPR_INFO (1 << 0) /* Basic info */
631 #define MPR_FAULT (1 << 1) /* Hardware faults */
632 #define MPR_EVENT (1 << 2) /* Event data from the controller */
633 #define MPR_LOG (1 << 3) /* Log data from the controller */
634 #define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */
635 #define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */
636 #define MPR_INIT (1 << 6) /* Things related to system init */
637 #define MPR_XINFO (1 << 7) /* More detailed/noisy info */
638 #define MPR_USER (1 << 8) /* Trace user-generated commands */
639 #define MPR_MAPPING (1 << 9) /* Trace device mappings */
640 #define MPR_TRACE (1 << 10) /* Function-by-function trace */
641
642 #define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0
643 #define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1
644 #define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2
645 #define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3
646
647 #define mpr_printf(sc, args...) \
648 device_printf((sc)->mpr_dev, ##args)
649
650 #define mpr_print_field(sc, msg, args...) \
651 printf("\t" msg, ##args)
652
653 #define mpr_vprintf(sc, args...) \
654 do { \
655 if (bootverbose) \
656 mpr_printf(sc, ##args); \
657 } while (0)
658
659 #define mpr_dprint(sc, level, msg, args...) \
660 do { \
661 if ((sc)->mpr_debug & (level)) \
662 device_printf((sc)->mpr_dev, msg, ##args); \
663 } while (0)
664
665 #define MPR_PRINTFIELD_START(sc, tag...) \
666 mpr_printf((sc), ##tag); \
667 mpr_print_field((sc), ":\n")
668 #define MPR_PRINTFIELD_END(sc, tag) \
669 mpr_printf((sc), tag "\n")
670 #define MPR_PRINTFIELD(sc, facts, attr, fmt) \
671 mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
672
673 static __inline void
mpr_from_u64(uint64_t data,U64 * mpr)674 mpr_from_u64(uint64_t data, U64 *mpr)
675 {
676 (mpr)->High = htole32((uint32_t)((data) >> 32));
677 (mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
678 }
679
680 static __inline uint64_t
mpr_to_u64(U64 * data)681 mpr_to_u64(U64 *data)
682 {
683 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
684 }
685
686 static __inline void
mpr_mask_intr(struct mpr_softc * sc)687 mpr_mask_intr(struct mpr_softc *sc)
688 {
689 uint32_t mask;
690
691 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
692 mask |= MPI2_HIM_REPLY_INT_MASK;
693 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
694 }
695
696 static __inline void
mpr_unmask_intr(struct mpr_softc * sc)697 mpr_unmask_intr(struct mpr_softc *sc)
698 {
699 uint32_t mask;
700
701 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
702 mask &= ~MPI2_HIM_REPLY_INT_MASK;
703 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
704 }
705
706 int mpr_pci_setup_interrupts(struct mpr_softc *sc);
707 int mpr_pci_restore(struct mpr_softc *sc);
708
709 void mpr_get_tunables(struct mpr_softc *sc);
710 int mpr_attach(struct mpr_softc *sc);
711 int mpr_free(struct mpr_softc *sc);
712 void mpr_intr(void *);
713 void mpr_intr_msi(void *);
714 void mpr_intr_locked(void *);
715 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
716 void *, struct mpr_event_handle **);
717 int mpr_restart(struct mpr_softc *);
718 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *);
719 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
720 void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm,
721 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data,
722 uint32_t data_in_sz, uint32_t data_out_sz);
723 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
724 int mpr_push_ieee_sge(struct mpr_command *, void *, int);
725 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
726 int mpr_attach_sas(struct mpr_softc *sc);
727 int mpr_detach_sas(struct mpr_softc *sc);
728 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
729 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
730 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
731 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
732 int mpr_attach_user(struct mpr_softc *);
733 void mpr_detach_user(struct mpr_softc *);
734 void mprsas_record_event(struct mpr_softc *sc,
735 MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
736
737 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
738 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command **cm, int timeout,
739 int sleep_flag);
740 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command **cm);
741
742 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
743 *mpi_reply, Mpi2BiosPage3_t *config_page);
744 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
745 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
746 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
747 Mpi2IOCPage8_t *);
748 int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
749 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
750 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
751 Mpi2SasDevicePage0_t *, u32 , u16 );
752 int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
753 *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);
754 int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t
755 *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);
756 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
757 Mpi2DriverMappingPage0_t *, u16 );
758 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
759 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
760 u16 handle);
761 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
762 u64 *wwid);
763 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
764 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
765 u32 page_address);
766 void mprsas_ir_shutdown(struct mpr_softc *sc);
767
768 int mpr_reinit(struct mpr_softc *sc);
769 void mprsas_handle_reinit(struct mpr_softc *sc);
770
771 void mpr_base_static_config_pages(struct mpr_softc *sc);
772
773 int mpr_mapping_initialize(struct mpr_softc *);
774 void mpr_mapping_topology_change_event(struct mpr_softc *,
775 Mpi2EventDataSasTopologyChangeList_t *);
776 void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc,
777 Mpi26EventDataPCIeTopologyChangeList_t *event_data);
778 void mpr_mapping_free_memory(struct mpr_softc *sc);
779 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
780 Mpi2DriverMappingPage0_t *, u16 );
781 void mpr_mapping_exit(struct mpr_softc *);
782 void mpr_mapping_check_devices(void *);
783 int mpr_mapping_allocate_memory(struct mpr_softc *sc);
784 unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16);
785 unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc,
786 u16 handle);
787 unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid,
788 u16 volHandle);
789 unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc,
790 u16 volHandle);
791 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
792 Mpi2EventDataSasEnclDevStatusChange_t *event_data);
793 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
794 Mpi2EventDataIrConfigChangeList_t *event_data);
795
796 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
797 MPI2_EVENT_NOTIFICATION_REPLY *event);
798 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
799 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle);
800 int mprsas_startup(struct mpr_softc *sc);
801 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int,
802 uint16_t);
803 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
804 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
805 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
806 void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
807 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm,
808 uint8_t type);
809
810 SYSCTL_DECL(_hw_mpr);
811
812 /* Compatibility shims for different OS versions */
813 #if __FreeBSD_version >= 800001
814 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
815 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
816 #define mpr_kproc_exit(arg) kproc_exit(arg)
817 #else
818 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
819 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
820 #define mpr_kproc_exit(arg) kthread_exit(arg)
821 #endif
822
823 #if defined(CAM_PRIORITY_XPT)
824 #define MPR_PRIORITY_XPT CAM_PRIORITY_XPT
825 #else
826 #define MPR_PRIORITY_XPT 5
827 #endif
828
829 #if __FreeBSD_version < 800107
830 // Prior to FreeBSD-8.0 scp3_flags was not defined.
831 #define spc3_flags reserved
832
833 #define SPC3_SID_PROTECT 0x01
834 #define SPC3_SID_3PC 0x08
835 #define SPC3_SID_TPGS_MASK 0x30
836 #define SPC3_SID_TPGS_IMPLICIT 0x10
837 #define SPC3_SID_TPGS_EXPLICIT 0x20
838 #define SPC3_SID_ACC 0x40
839 #define SPC3_SID_SCCS 0x80
840
841 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
842 #endif
843
844 /* Definitions for SCSI unmap translation to NVMe DSM command */
845
846 /* UNMAP block descriptor structure */
847 struct unmap_blk_desc {
848 uint64_t slba;
849 uint32_t nlb;
850 uint32_t resv;
851 };
852
853 /* UNMAP command's data */
854 struct unmap_parm_list {
855 uint16_t unmap_data_len;
856 uint16_t unmap_blk_desc_data_len;
857 uint32_t resv;
858 struct unmap_blk_desc desc[0];
859 };
860
861 /* SCSI ADDITIONAL SENSE Codes */
862 #define FIXED_SENSE_DATA 0x70
863 #define SCSI_ASC_NO_SENSE 0x00
864 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
865 #define SCSI_ASC_LUN_NOT_READY 0x04
866 #define SCSI_ASC_WARNING 0x0B
867 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
868 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
869 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
870 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
871 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
872 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
873 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
874 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
875 #define SCSI_ASC_INVALID_CDB 0x24
876 #define SCSI_ASC_INVALID_LUN 0x25
877 #define SCSI_ASC_INVALID_PARAMETER 0x26
878 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
879 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
880
881 /* SCSI ADDITIONAL SENSE Code Qualifiers */
882 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
883 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
884 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
885 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
886 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
887 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
888 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
889 #define SCSI_ASCQ_INVALID_LUN_ID 0x09
890
891 #endif
892
893