Searched refs:MIMG (Results 1 – 10 of 10) sorted by relevance
1 //===-- MIMGInstructions.td - MIMG Instruction Defintions -----------------===//9 // MIMG-specific encoding families to distinguish between semantically125 let MIMG = 1;138 class MIMG <dag outs, string dns = "">152 let FilterClass = "MIMG";182 // Base class of all pre-gfx10 MIMG instructions.184 : MIMG<outs, dns>, MIMGe_gfx6789<op> {193 // Base class of all non-NSA gfx10 MIMG instructions.195 : MIMG<outs, dns>, MIMGe_gfx10<op> {205 // Base class for all NSA MIMG instructions. Note that 1-dword addresses always[all …]
101 MIMG, enumerator336 return MIMG; in getInstClass()496 if (InstClass == MIMG) { in setMI()510 } else if (InstClass != MIMG) { in setMI()662 assert(CI.InstClass == MIMG); in dmasksCanBeCombined()724 assert(CI.InstClass != MIMG); in offsetsCanBeCombined()915 CI.InstClass == MIMG in findMatchingInst()1439 case MIMG: in getNewOpcode()1452 if (CI.InstClass == MIMG) { in getSubRegIdxs()2025 case MIMG: { in optimizeInstsWithSameBaseAddr()
41 field bit MIMG = 0;153 let TSFlags{19} = MIMG;
48 MIMG = 1 << 19, enumerator
482 return MI.getDesc().TSFlags & SIInstrFlags::MIMG; in isMIMG()486 return get(Opcode).TSFlags & SIInstrFlags::MIMG; in isMIMG()
202 "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero"
294 if (AMDGPU::isGFX10(STI) && Desc.TSFlags & SIInstrFlags::MIMG) { in encodeInstruction()
2946 if ((Desc.TSFlags & SIInstrFlags::MIMG) == 0) in validateMIMGDataSize()2978 if ((Desc.TSFlags & SIInstrFlags::MIMG) == 0 || !isGFX10()) in validateMIMGAddrSize()3019 if ((Desc.TSFlags & SIInstrFlags::MIMG) == 0) in validateMIMGAtomicDMask()3093 if ((Desc.TSFlags & SIInstrFlags::MIMG) == 0) in validateMIMGD16()3109 if ((Desc.TSFlags & SIInstrFlags::MIMG) == 0) in validateMIMGDim()
373 if (Res && (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::MIMG)) { in getInstruction()
497 bit DA = 0; // DA bit in MIMG encoding