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Searched refs:IsRV64 (Results 1 – 14 of 14) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/Utils/
HDRISCVMatInt.cpp19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) { in generateInstSeq() argument
35 unsigned AddiOpc = (IsRV64 && Hi20) ? RISCV::ADDIW : RISCV::ADDI; in generateInstSeq()
41 assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); in generateInstSeq()
71 generateInstSeq(Hi52, IsRV64, Res); in generateInstSeq()
78 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64) { in getIntMatCost() argument
79 int PlatRegSize = IsRV64 ? 64 : 32; in getIntMatCost()
87 generateInstSeq(Chunk.getSExtValue(), IsRV64, MatSeq); in getIntMatCost()
HDRISCVBaseInfo.cpp16 bool IsRV64 = TT.isArch64Bit(); in computeTargetABI() local
23 } else if (ABIName.startswith("ilp32") && IsRV64) { in computeTargetABI()
27 } else if (ABIName.startswith("lp64") && !IsRV64) { in computeTargetABI()
47 if (IsRV64) in computeTargetABI()
HDRISCVMatInt.h33 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res);
41 int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVInstrInfoC.td320 let Predicates = [HasStdExtC, IsRV64] in
354 let Predicates = [HasStdExtC, IsRV64] in
395 Predicates = [HasStdExtC, IsRV64] in
457 let Predicates = [HasStdExtC, IsRV64] in {
505 let Predicates = [HasStdExtC, IsRV64] in
564 let Predicates = [HasStdExtC, IsRV64] in
702 let Predicates = [HasStdExtC, IsRV64] in
713 let Predicates = [HasStdExtC, IsRV64] in
724 let Predicates = [HasStdExtC, IsRV64] in
735 let Predicates = [HasStdExtC, IsRV64] in
[all …]
HDRISCVInstrInfoM.td45 let Predicates = [HasStdExtM, IsRV64] in {
56 } // Predicates = [HasStdExtM, IsRV64]
73 let Predicates = [HasStdExtM, IsRV64] in {
97 } // Predicates = [HasStdExtM, IsRV64]
HDRISCVInstrInfoD.td163 let Predicates = [HasStdExtD, IsRV64] in {
197 } // Predicates = [HasStdExtD, IsRV64]
240 // [u]int<->double conversion patterns must be gated on IsRV32 or IsRV64, so
344 let Predicates = [HasStdExtD, IsRV64] in {
365 } // Predicates = [HasStdExtD, IsRV64]
HDRISCVInstrInfoF.td202 let Predicates = [HasStdExtF, IsRV64] in {
226 } // Predicates = [HasStdExtF, IsRV64]
300 // [u]int32<->float conversion patterns must be gated on IsRV32 or IsRV64, so
397 let Predicates = [HasStdExtF, IsRV64] in {
419 } // Predicates = [HasStdExtF, IsRV64]
HDRISCVInstrInfo.td495 let Predicates = [IsRV64] in {
520 } // Predicates = [IsRV64]
584 let Predicates = [IsRV64] in {
588 } // Predicates = [IsRV64]
594 let Predicates = [IsRV64] in {
597 } // Predicates = [IsRV64]
719 let Predicates = [IsRV64] in {
735 } // Predicates = [IsRV64]
1061 let Predicates = [IsRV64] in {
1098 } // Predicates = [IsRV64]
[all …]
HDRISCVInstrInfoA.td103 let Predicates = [HasStdExtA, IsRV64] in {
125 } // Predicates = [HasStdExtA, IsRV64]
317 let Predicates = [HasStdExtA, IsRV64] in {
391 } // Predicates = [HasStdExtA, IsRV64]
HDRISCVInstrInfo.cpp170 bool IsRV64 = MF->getSubtarget<RISCVSubtarget>().is64Bit(); in movImm() local
175 if (!IsRV64 && !isInt<32>(Val)) in movImm()
179 RISCVMatInt::generateInstSeq(Val, IsRV64, Seq); in movImm()
HDRISCV.td60 def IsRV64 : Predicate<"Subtarget->is64Bit()">,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
HDRISCVAsmParser.cpp224 bool IsRV64; member
255 IsRV64 = o.IsRV64; in RISCVOperand()
618 bool isRV64() const { return IsRV64; } in isRV64()
659 bool IsRV64) { in createToken()
664 Op->IsRV64 = IsRV64; in createToken()
669 SMLoc E, bool IsRV64) { in createReg()
674 Op->IsRV64 = IsRV64; in createReg()
679 SMLoc E, bool IsRV64) { in createImm()
684 Op->IsRV64 = IsRV64; in createImm()
689 createSysReg(StringRef Str, SMLoc S, unsigned Encoding, bool IsRV64) { in createSysReg()
[all …]
/freebsd-11-stable/contrib/llvm-project/clang/lib/Driver/ToolChains/
HDRISCVToolchain.cpp137 bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64; in ConstructJob() local
139 if (IsRV64) { in ConstructJob()
HDGnu.cpp1596 bool IsRV64 = TargetTriple.getArch() == llvm::Triple::riscv64; in findRISCVMultilibs() local
1599 addMultilibFlag(!IsRV64, "m32", Flags); in findRISCVMultilibs()
1600 addMultilibFlag(IsRV64, "m64", Flags); in findRISCVMultilibs()