| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/ |
| HD | TargetSelectionDAG.td | 771 bit IsLoad = ?; 924 let IsLoad = 1; 928 let IsLoad = 1; 934 let IsLoad = 1; 938 let IsLoad = 1; 942 let IsLoad = 1; 947 let IsLoad = 1; 951 let IsLoad = 1; 955 let IsLoad = 1; 959 let IsLoad = 1; [all …]
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| HD | PPCVSXSwapRemoval.cpp | 74 unsigned int IsLoad : 1; member 341 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 347 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 358 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions() 668 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs() 679 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs() 703 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || in recordUnoptimizableWebs() 754 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval() 980 if (SwapVector[EntryIdx].IsLoad) in dumpSwapVector()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| HD | NVPTXInstrFormats.td | 35 bit IsLoad = 0; 51 let TSFlags{5-5} = IsLoad;
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPUInstructions.td | 368 let IsLoad = 1; 373 let IsLoad = 1; 378 let IsLoad = 1; 383 let IsLoad = 1; 388 let IsLoad = 1; 393 let IsLoad = 1; 398 let IsLoad = 1; 482 let IsLoad = 1; 488 let IsLoad = 1;
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| HD | SIInstrInfo.td | 361 let IsLoad = 1; 366 let IsLoad = 1; 383 let IsLoad = 1; 388 let IsLoad = 1; 393 let IsLoad = 1; 398 let IsLoad = 1; 403 let IsLoad = 1; 408 let IsLoad = 1; 413 let IsLoad = 1; 418 let IsLoad = 1; [all …]
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| HD | Loads.h | 154 bool *IsLoad, unsigned *NumScanedInst);
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| /freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| HD | X86FoldTablesEmitter.cpp | 103 bool IsLoad = false; member in __anon1f5fdb320111::X86FoldTablesEmitter::X86FoldTableEntry 119 if (IsLoad) in print() 474 Result.IsLoad = true; in addEntryWithFlags()
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| HD | CheckerManager.cpp | 318 bool IsLoad; member 327 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), in CheckLocationContext() 335 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : in runChecker() 342 checkFn(Loc, IsLoad, BoundEx, C); in runChecker()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Utils/ |
| HD | X86ShuffleDecode.h | 146 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad,
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| HD | X86ShuffleDecode.cpp | 406 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad, in DecodeScalarMoveMask() argument 412 Mask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i); in DecodeScalarMoveMask()
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| HD | CheckerDocumentation.cpp | 154 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, in checkLocation() argument
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| HD | ObjCSuperDeallocChecker.cpp | 129 void ObjCSuperDeallocChecker::checkLocation(SVal L, bool IsLoad, const Stmt *S, in checkLocation() argument
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| HD | NSErrorChecker.cpp | 239 if (event.IsLoad) in checkEvent()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| HD | Loads.cpp | 365 AliasAnalysis *AA, bool *IsLoad, in FindAvailableLoadedValue() argument 373 ScanFrom, MaxInstsToScan, AA, IsLoad, NumScanedInst); in FindAvailableLoadedValue()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| HD | ARCOptAddrMode.cpp | 424 bool IsLoad = Ldst->mayLoad(); in canSinkLoadStoreTo() local 426 Register ValReg = IsLoad ? Ldst->getOperand(0).getReg() : Register(); in canSinkLoadStoreTo()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| HD | ARMLoadStoreOptimizer.cpp | 496 bool IsLoad = in UpdateBaseRegUses() local 501 if (IsLoad || IsStore) { in UpdateBaseRegUses() 836 bool IsLoad = isi32Load(Opcode); in CreateLoadStoreDouble() local 837 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); in CreateLoadStoreDouble() 838 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; in CreateLoadStoreDouble() 843 if (IsLoad) { in CreateLoadStoreDouble() 859 bool IsLoad = isLoadSingle(Opcode); in MergeOpsUpdate() local 874 if (IsLoad) { in MergeOpsUpdate()
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| HD | ARMExpandPseudoInsts.cpp | 125 bool IsLoad; member 475 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVLD() 586 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVST() 685 if (TableEntry->IsLoad) { in ExpandLaneOp() 710 if (!TableEntry->IsLoad) in ExpandLaneOp() 735 if (TableEntry->IsLoad) in ExpandLaneOp()
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| HD | CGAtomic.cpp | 1267 bool IsLoad = E->getOp() == AtomicExpr::AO__c11_atomic_load || in EmitAtomicExpr() local 1290 if (IsLoad) in EmitAtomicExpr() 1296 if (IsLoad || IsStore) in EmitAtomicExpr() 1324 if (!IsLoad) in EmitAtomicExpr() 1326 if (!IsLoad && !IsStore) in EmitAtomicExpr() 1353 if (!IsLoad) { in EmitAtomicExpr() 1361 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| HD | InlineSpiller.cpp | 720 bool IsLoad = InstrReg; in coalesceStackAccess() local 721 if (!IsLoad) in coalesceStackAccess() 728 if (!IsLoad) in coalesceStackAccess() 735 if (IsLoad) { in coalesceStackAccess()
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| HD | MachineScheduler.cpp | 1513 bool IsLoad; member in __anonecf5ad1f0311::BaseMemOpClusterMutation 1517 const TargetRegisterInfo *tri, bool IsLoad) in BaseMemOpClusterMutation() argument 1518 : TII(tii), TRI(tri), IsLoad(IsLoad) {} in BaseMemOpClusterMutation() 1606 if ((IsLoad && !SU.getInstr()->mayLoad()) || in apply() 1607 (!IsLoad && !SU.getInstr()->mayStore())) in apply()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| HD | AArch64Disassembler.cpp | 1276 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodeSignedLdStInstruction() local 1281 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction() 1377 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodePairLdStInstruction() local 1493 if (IsLoad && Rt == Rt2) in DecodePairLdStInstruction()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| HD | HexagonExpandCondsets.cpp | 822 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore(); in canMoveMemTo() local 823 if (!IsLoad && !IsStore) in canMoveMemTo()
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| HD | HexagonConstExtenders.cpp | 1146 bool IsLoad = MI.mayLoad(); in recordExtender() local 1156 if (IsLoad || IsStore) { in recordExtender()
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| /freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/ |
| HD | Checker.h | 555 bool IsLoad; member
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| HD | MipsAsmParser.cpp | 258 const MCSubtargetInfo *STI, bool IsLoad); 260 const MCSubtargetInfo *STI, bool IsLoad); 324 const MCSubtargetInfo *STI, bool IsLoad); 3650 const MCSubtargetInfo *STI, bool IsLoad) { in expandMem16Inst() argument 3674 if (!IsLoad || !IsGPR || (BaseReg == DstReg)) { in expandMem16Inst() 3777 const MCSubtargetInfo *STI, bool IsLoad) { in expandMem9Inst() argument 3801 if (!IsLoad || !IsGPR || (BaseReg == DstReg)) { in expandMem9Inst() 5166 bool IsLoad) { in expandLoadStoreDMacro() argument 5173 unsigned Opcode = IsLoad ? Mips::LW : Mips::SW; in expandLoadStoreDMacro() 5194 if (FirstReg != BaseReg || !IsLoad) { in expandLoadStoreDMacro()
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