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Searched refs:IsLoad (Results 1 – 25 of 31) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/
HDTargetSelectionDAG.td771 bit IsLoad = ?;
924 let IsLoad = 1;
928 let IsLoad = 1;
934 let IsLoad = 1;
938 let IsLoad = 1;
942 let IsLoad = 1;
947 let IsLoad = 1;
951 let IsLoad = 1;
955 let IsLoad = 1;
959 let IsLoad = 1;
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCVSXSwapRemoval.cpp74 unsigned int IsLoad : 1; member
341 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions()
347 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions()
358 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions()
668 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs()
679 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
703 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || in recordUnoptimizableWebs()
754 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval()
980 if (SwapVector[EntryIdx].IsLoad) in dumpSwapVector()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
HDNVPTXInstrFormats.td35 bit IsLoad = 0;
51 let TSFlags{5-5} = IsLoad;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDAMDGPUInstructions.td368 let IsLoad = 1;
373 let IsLoad = 1;
378 let IsLoad = 1;
383 let IsLoad = 1;
388 let IsLoad = 1;
393 let IsLoad = 1;
398 let IsLoad = 1;
482 let IsLoad = 1;
488 let IsLoad = 1;
HDSIInstrInfo.td361 let IsLoad = 1;
366 let IsLoad = 1;
383 let IsLoad = 1;
388 let IsLoad = 1;
393 let IsLoad = 1;
398 let IsLoad = 1;
403 let IsLoad = 1;
408 let IsLoad = 1;
413 let IsLoad = 1;
418 let IsLoad = 1;
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
HDLoads.h154 bool *IsLoad, unsigned *NumScanedInst);
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
HDX86FoldTablesEmitter.cpp103 bool IsLoad = false; member in __anon1f5fdb320111::X86FoldTablesEmitter::X86FoldTableEntry
119 if (IsLoad) in print()
474 Result.IsLoad = true; in addEntryWithFlags()
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
HDCheckerManager.cpp318 bool IsLoad; member
327 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), in CheckLocationContext()
335 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : in runChecker()
342 checkFn(Loc, IsLoad, BoundEx, C); in runChecker()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Utils/
HDX86ShuffleDecode.h146 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad,
HDX86ShuffleDecode.cpp406 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad, in DecodeScalarMoveMask() argument
412 Mask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i); in DecodeScalarMoveMask()
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
HDCheckerDocumentation.cpp154 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, in checkLocation() argument
HDObjCSuperDeallocChecker.cpp129 void ObjCSuperDeallocChecker::checkLocation(SVal L, bool IsLoad, const Stmt *S, in checkLocation() argument
HDNSErrorChecker.cpp239 if (event.IsLoad) in checkEvent()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDLoads.cpp365 AliasAnalysis *AA, bool *IsLoad, in FindAvailableLoadedValue() argument
373 ScanFrom, MaxInstsToScan, AA, IsLoad, NumScanedInst); in FindAvailableLoadedValue()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
HDARCOptAddrMode.cpp424 bool IsLoad = Ldst->mayLoad(); in canSinkLoadStoreTo() local
426 Register ValReg = IsLoad ? Ldst->getOperand(0).getReg() : Register(); in canSinkLoadStoreTo()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDARMLoadStoreOptimizer.cpp496 bool IsLoad = in UpdateBaseRegUses() local
501 if (IsLoad || IsStore) { in UpdateBaseRegUses()
836 bool IsLoad = isi32Load(Opcode); in CreateLoadStoreDouble() local
837 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); in CreateLoadStoreDouble()
838 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; in CreateLoadStoreDouble()
843 if (IsLoad) { in CreateLoadStoreDouble()
859 bool IsLoad = isLoadSingle(Opcode); in MergeOpsUpdate() local
874 if (IsLoad) { in MergeOpsUpdate()
HDARMExpandPseudoInsts.cpp125 bool IsLoad; member
475 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVLD()
586 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVST()
685 if (TableEntry->IsLoad) { in ExpandLaneOp()
710 if (!TableEntry->IsLoad) in ExpandLaneOp()
735 if (TableEntry->IsLoad) in ExpandLaneOp()
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/
HDCGAtomic.cpp1267 bool IsLoad = E->getOp() == AtomicExpr::AO__c11_atomic_load || in EmitAtomicExpr() local
1290 if (IsLoad) in EmitAtomicExpr()
1296 if (IsLoad || IsStore) in EmitAtomicExpr()
1324 if (!IsLoad) in EmitAtomicExpr()
1326 if (!IsLoad && !IsStore) in EmitAtomicExpr()
1353 if (!IsLoad) { in EmitAtomicExpr()
1361 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDInlineSpiller.cpp720 bool IsLoad = InstrReg; in coalesceStackAccess() local
721 if (!IsLoad) in coalesceStackAccess()
728 if (!IsLoad) in coalesceStackAccess()
735 if (IsLoad) { in coalesceStackAccess()
HDMachineScheduler.cpp1513 bool IsLoad; member in __anonecf5ad1f0311::BaseMemOpClusterMutation
1517 const TargetRegisterInfo *tri, bool IsLoad) in BaseMemOpClusterMutation() argument
1518 : TII(tii), TRI(tri), IsLoad(IsLoad) {} in BaseMemOpClusterMutation()
1606 if ((IsLoad && !SU.getInstr()->mayLoad()) || in apply()
1607 (!IsLoad && !SU.getInstr()->mayStore())) in apply()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
HDAArch64Disassembler.cpp1276 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodeSignedLdStInstruction() local
1281 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction()
1377 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodePairLdStInstruction() local
1493 if (IsLoad && Rt == Rt2) in DecodePairLdStInstruction()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonExpandCondsets.cpp822 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore(); in canMoveMemTo() local
823 if (!IsLoad && !IsStore) in canMoveMemTo()
HDHexagonConstExtenders.cpp1146 bool IsLoad = MI.mayLoad(); in recordExtender() local
1156 if (IsLoad || IsStore) { in recordExtender()
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/
HDChecker.h555 bool IsLoad; member
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
HDMipsAsmParser.cpp258 const MCSubtargetInfo *STI, bool IsLoad);
260 const MCSubtargetInfo *STI, bool IsLoad);
324 const MCSubtargetInfo *STI, bool IsLoad);
3650 const MCSubtargetInfo *STI, bool IsLoad) { in expandMem16Inst() argument
3674 if (!IsLoad || !IsGPR || (BaseReg == DstReg)) { in expandMem16Inst()
3777 const MCSubtargetInfo *STI, bool IsLoad) { in expandMem9Inst() argument
3801 if (!IsLoad || !IsGPR || (BaseReg == DstReg)) { in expandMem9Inst()
5166 bool IsLoad) { in expandLoadStoreDMacro() argument
5173 unsigned Opcode = IsLoad ? Mips::LW : Mips::SW; in expandLoadStoreDMacro()
5194 if (FirstReg != BaseReg || !IsLoad) { in expandLoadStoreDMacro()

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