| /freebsd-11-stable/contrib/binutils/opcodes/ |
| HD | i386-tbl.h | 21 { Imm8|Imm16|Imm32|Imm32S, 25 { Imm8|Imm16|Imm32|Imm32S, 237 { Imm8, 245 { Imm8 } }, 252 Imm8 } }, 259 { Imm8 } }, 339 { Imm8|Imm16|Imm32|Imm32S, 343 { Imm8|Imm16|Imm32|Imm32S, 361 { Imm8|Imm16|Imm32|Imm32S, 365 { Imm8|Imm16|Imm32|Imm32S, [all …]
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| HD | i386-opc.h | 151 #define Imm8 0x10 /* 8 bit immediate */ macro 197 #define Imm (Imm8|Imm8S|Imm16|Imm32S|Imm32|Imm64) /* gen'l immediate */ 198 #define EncImm (Imm8|Imm16|Imm32|Imm32S) /* Encodable gen'l immediate */
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| HD | i386-opc.tbl | 11 mov, 2, 0xb0, None, 0, W|ShortForm|No_sSuf|No_qSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|R… 12 mov, 2, 0xc6, 0x0, 0, W|Modrm|No_sSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Ba… 107 in, 2, 0xe4, None, 0, W|No_sSuf|No_qSuf|No_xSuf, { Imm8, Acc } 109 in, 1, 0xe4, None, 0, W|No_sSuf|No_qSuf|No_xSuf, { Imm8 } 111 out, 2, 0xe6, None, 0, W|No_sSuf|No_qSuf|No_xSuf, { Acc, Imm8 } 113 out, 1, 0xe6, None, 0, W|No_sSuf|No_qSuf|No_xSuf, { Imm8 } 145 add, 2, 0x4, None, 0, W|No_sSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Acc } 146 add, 2, 0x80, 0x0, 0, W|Modrm|No_sSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Ba… 153 sub, 2, 0x2c, None, 0, W|No_sSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Acc } 154 sub, 2, 0x80, 0x5, 0, W|Modrm|No_sSuf|No_xSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Ba… [all …]
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| HD | ARMMCCodeEmitter.cpp | 1119 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local 1125 Imm8 = 0; in getT2AddrModeImm8s4OpValue() 1135 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI); in getT2AddrModeImm8s4OpValue() 1143 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue() 1189 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue() local 1190 return (Reg << 8) | Imm8; in getT2AddrModeImm0_1020s4OpValue() 1331 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OffsetOpValue() local 1334 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OffsetOpValue() 1335 return Imm8 | (isAdd << 8) | (isImm << 9); in getAddrMode3OffsetOpValue() 1367 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OpValue() local [all …]
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| HD | ARMAddressingModes.h | 545 unsigned Imm8 = getVMOVModImmVal(ModImm); in decodeVMOVModImm() local 550 Val = Imm8; in decodeVMOVModImm() 555 Val = Imm8 << (8 * ByteNum); in decodeVMOVModImm() 560 Val = Imm8 << (8 * ByteNum); in decodeVMOVModImm() 565 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeVMOVModImm()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86InstrFormats.td | 80 def Imm8 : ImmType<1>; 386 : X86Inst<o, f, Imm8, outs, ins, asm, d> { 566 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix. 596 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix. 598 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix. 600 // PDIi8 - SSE2 instructions with ImmT == Imm8 and PD prefix. 606 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as 608 // MMXSSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix as well as 708 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8. 743 // AVXAIi8 - AVX instructions with TAPD prefix and ImmT = Imm8. [all …]
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| HD | X86InstrArithmetic.td | 565 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32 608 Imm8, i8imm, relocImm8_su, i8imm, invalid_node, 771 let ImmT = Imm8; // Always 8-bit immediate. 865 let ImmT = Imm8; // Always 8-bit immediate.
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| HD | X86BaseInfo.h | 779 Imm8 = 1 << ImmShift, enumerator 918 case X86II::Imm8: in getSizeOfImm() 939 case X86II::Imm8: in isImmPCRel() 956 case X86II::Imm8: in isImmSigned()
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| /freebsd-11-stable/contrib/binutils/gas/config/ |
| HD | tc-i386.c | 943 return Imm1 | Imm8 | Imm8S | Imm16 | Imm32 | Imm32S | Imm64; in smallest_imm_type() 946 ? (Imm8S | Imm8 | Imm16 | Imm32 | Imm32S | Imm64) in smallest_imm_type() 948 ? (Imm8 | Imm16 | Imm32 | Imm32S | Imm64) in smallest_imm_type() 1445 { Imm8, "i8" }, 1857 i.types[i.operands++] = Imm8; 2365 i.types[op] |= Imm16 | Imm8 | Imm8S | Imm32S | Imm32 | Imm64; in optimize_imm() 2425 mask = Imm8; in optimize_imm() 3243 if ((overlap0 & (Imm8 | Imm8S | Imm16 | Imm32 | Imm32S | Imm64)) in finalize_imm() 3244 && overlap0 != Imm8 && overlap0 != Imm8S in finalize_imm() 3251 ? Imm8 | Imm8S in finalize_imm() [all …]
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| HD | ARMAsmParser.cpp | 7801 unsigned Imm8 = Inst.getOperand(0).getImm(); in validateInstruction() local 7805 if (Imm8 == 0x10 && Pred != ARMCC::AL && hasRAS()) in validateInstruction() 7809 if (Imm8 == 0x14 && Pred != ARMCC::AL) in validateInstruction()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| HD | ARMInstrInfo.td | 742 def Imm8AsmOperand: ImmAsmOperand<8,8> { let Name = "Imm8"; }
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| /freebsd-11-stable/contrib/binutils/gas/ |
| HD | ChangeLog-0001 | 3750 (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
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