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Searched refs:IXGBE_WRITE_REG (Results 1 – 19 of 19) sorted by relevance

/freebsd-11-stable/sys/dev/ixgbe/
HDixgbe_dcb_82599.c131 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
143 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); in ixgbe_dcb_config_rx_arbiter_82599()
156 IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg); in ixgbe_dcb_config_rx_arbiter_82599()
164 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
184 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); in ixgbe_dcb_config_tx_desc_arbiter_82599()
185 IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0); in ixgbe_dcb_config_tx_desc_arbiter_82599()
201 IXGBE_WRITE_REG(hw, IXGBE_RTTDT2C(i), reg); in ixgbe_dcb_config_tx_desc_arbiter_82599()
209 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82599()
235 IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82599()
247 IXGBE_WRITE_REG(hw, IXGBE_RTTUP2TC, reg); in ixgbe_dcb_config_tx_data_arbiter_82599()
[all …]
HDixgbe_dcb_82598.c127 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
137 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
149 IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg); in ixgbe_dcb_config_rx_arbiter_82598()
156 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
161 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
189 IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82598()
204 IXGBE_WRITE_REG(hw, IXGBE_TDTQ2TCCR(i), reg); in ixgbe_dcb_config_tx_desc_arbiter_82598()
230 IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
244 IXGBE_WRITE_REG(hw, IXGBE_TDPT2TCCR(i), reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
250 IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
[all …]
HDixgbe_common.c353 IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg); in ixgbe_setup_fc_generic()
360 IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg); in ixgbe_setup_fc_generic()
416 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); in ixgbe_start_hw_generic()
465 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); in ixgbe_start_hw_gen2()
466 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0); in ixgbe_start_hw_gen2()
474 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval); in ixgbe_start_hw_gen2()
481 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); in ixgbe_start_hw_gen2()
1128 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); in ixgbe_stop_adapter_generic()
1135 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(i), IXGBE_TXDCTL_SWFLSH); in ixgbe_stop_adapter_generic()
1142 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), reg_val); in ixgbe_stop_adapter_generic()
[all …]
HDixgbe_82598.c109 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
271 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval); in ixgbe_start_hw_82598()
279 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); in ixgbe_start_hw_82598()
519 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); in ixgbe_fc_enable_82598()
520 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); in ixgbe_fc_enable_82598()
528 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl); in ixgbe_fc_enable_82598()
529 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), fcrth); in ixgbe_fc_enable_82598()
531 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); in ixgbe_fc_enable_82598()
532 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); in ixgbe_fc_enable_82598()
540 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); in ixgbe_fc_enable_82598()
[all …]
HDixgbe_82599.c135 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_init_phy_ops_82599()
201 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value); in ixgbe_setup_sfp_modules_82599()
300 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in prot_autoc_write_82599()
599 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg); in ixgbe_stop_mac_link_on_d3_82599()
689 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_disable_tx_laser_multispeed_fiber()
708 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_enable_tx_laser_multispeed_fiber()
765 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_set_hard_rate_select_speed()
1090 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82599()
1129 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); in ixgbe_reset_hw_82599()
1164 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); in ixgbe_reset_hw_82599()
[all …]
HDif_sriov.c247 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr); in ixgbe_vf_set_default_vlan()
248 IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir); in ixgbe_vf_set_default_vlan()
324 IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte); in ixgbe_vf_enable_transmit()
342 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre); in ixgbe_vf_enable_receive()
428 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg); in ixgbe_vf_set_mc_addr()
432 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr); in ixgbe_vf_set_mc_addr()
502 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); in ixgbe_vf_set_lpe()
726 IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), IXGBE_VF_BIT(adapter->pool)); in ixgbe_uninit_iov()
727 IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), IXGBE_VF_BIT(adapter->pool)); in ixgbe_uninit_iov()
733 IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0); in ixgbe_uninit_iov()
[all …]
HDif_ix.c429 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); in ixgbe_initialize_rss_mapping()
431 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), in ixgbe_initialize_rss_mapping()
439 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]); in ixgbe_initialize_rss_mapping()
481 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); in ixgbe_initialize_rss_mapping()
512 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); in ixgbe_initialize_receive_units()
531 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); in ixgbe_initialize_receive_units()
541 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), in ixgbe_initialize_receive_units()
543 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); in ixgbe_initialize_receive_units()
544 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), in ixgbe_initialize_receive_units()
567 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); in ixgbe_initialize_receive_units()
[all …]
HDixgbe_vf.c39 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
117 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); in ixgbe_virt_clr_reg()
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); in ixgbe_virt_clr_reg()
121 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); in ixgbe_virt_clr_reg()
122 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); in ixgbe_virt_clr_reg()
123 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); in ixgbe_virt_clr_reg()
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); in ixgbe_virt_clr_reg()
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); in ixgbe_virt_clr_reg()
126 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); in ixgbe_virt_clr_reg()
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); in ixgbe_virt_clr_reg()
[all …]
HDif_ixv.c634 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, IXGBE_EICS_RTX_QUEUE); in ixv_init_locked()
637 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(adapter->vector), IXGBE_LINK_ITR); in ixv_init_locked()
671 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); in ixv_enable_queue()
682 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, mask); in ixv_disable_queue()
689 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEICS, mask); in ixv_rearm_queues()
734 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEITR(que->msix), in ixv_msix_que()
793 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, reg); in ixv_msix_mbx()
799 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, IXGBE_EIMS_OTHER); in ixv_msix_mbx()
1266 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), txdctl); in ixv_initialize_transmit_units()
1269 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VFTDH(i), 0); in ixv_initialize_transmit_units()
[all …]
HDixgbe_x540.c237 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X540()
267 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT); in ixgbe_reset_hw_X540()
701 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); in ixgbe_update_flash_X540()
714 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); in ixgbe_update_flash_X540()
799 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), in ixgbe_acquire_swfw_sync_X540()
824 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); in ixgbe_acquire_swfw_sync_X540()
873 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); in ixgbe_release_swfw_sync_X540()
953 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
957 IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
1021 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_start_X540()
[all …]
HDixgbe_mbx.c296 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_VFU); in ixgbe_obtain_mbx_lock_vf()
341 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ); in ixgbe_write_mbx_vf()
375 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK); in ixgbe_read_mbx_vf()
423 IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask); in ixgbe_check_for_bit_pf()
509 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); in ixgbe_check_for_rst_pf()
531 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU); in ixgbe_obtain_mbx_lock_pf()
576 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS); in ixgbe_write_mbx_pf()
615 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK); in ixgbe_read_mbx_pf()
HDixgbe_netmap.c138 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); in set_crcstrip()
139 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); in set_crcstrip()
298 IXGBE_WRITE_REG(&adapter->hw, txr->tail, nic_i); in ixgbe_netmap_txsync()
484 IXGBE_WRITE_REG(&adapter->hw, rxr->tail, nic_i); in ixgbe_netmap_rxsync()
HDixgbe_x550.c335 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_setup_mux_ctl()
358 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi_22()
400 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi_22()
408 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi_22()
989 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_config_X550()
1015 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_config_X550()
1072 IXGBE_WRITE_REG(hw, IXGBE_DMCTH(tc), reg); in ixgbe_dmac_config_tcs_X550()
1092 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_update_tcs_X550()
1099 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_update_tcs_X550()
1159 IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp); in ixgbe_set_source_address_pruning_X550()
[all …]
HDixgbe_phy.c592 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
623 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
694 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
702 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
731 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
2276 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_i2c_stop()
2332 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2358 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_get_i2c_ack()
2407 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2481 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_raise_i2c_clk()
[all …]
HDixgbe_common.h41 IXGBE_WRITE_REG(hw, reg, (u32) value); \
42 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
HDif_fdir.c65 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); in ixgbe_reinit_fdir()
HDix_txrx.c462 IXGBE_WRITE_REG(&adapter->hw, txr->tail, i);
1168 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1185 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(rxr->me), rscctrl);
1188 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0),
1192 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
1270 IXGBE_WRITE_REG(&adapter->hw, rxr->tail, rxr->next_to_refresh);
HDixgbe_osdep.h230 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val) macro
/freebsd-11-stable/sys/dev/netmap/
HDixgbe_netmap.h108 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl); in set_crcstrip()
109 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc); in set_crcstrip()
283 IXGBE_WRITE_REG(&adapter->hw, txr->tail, nic_i); in ixgbe_netmap_txsync()
470 IXGBE_WRITE_REG(&adapter->hw, rxr->tail, nic_i); in ixgbe_netmap_rxsync()