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Searched refs:I3 (Results 1 – 18 of 18) sorted by relevance

/freebsd-11-stable/contrib/binutils/opcodes/
HDmips16-opc.c62 #define I3 INSN_ISA3 macro
116 {"dla", "y,E", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 },
117 {"daddiu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, 0, I3 },
118 {"daddiu", "y,j", 0xfd00, 0xff00, WR_y|RD_y, 0, I3 },
119 {"daddiu", "S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 },
120 {"daddiu", "S,S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 },
121 {"daddiu", "y,P,W", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 },
122 {"daddiu", "y,S,W", 0xff00, 0xff00, WR_y|RD_SP, 0, I3 },
123 {"daddu", "z,v,y", 0xe000, 0xf803, WR_z|RD_x|RD_y, 0, I3 },
124 {"daddu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, 0, I3 },
[all …]
HDmips-opc.c84 #define I3 INSN_ISA3 macro
188 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I3 },/* daddu */
479 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, 0, I3|I32|T3},
480 {"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I3|I32|T3},
481 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
482 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 },
506 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
509 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 },
510 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 },
511 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 },
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64SchedThunderX3T110.td76 // Branch micro-ops on ports I2/I3.
79 // Branch micro-ops on ports I1/I2/I3.
85 // Integer micro-ops on ports I0/I1/I2/I3.
155 // 1 cycle on I2/I3
161 // 8 cycles on I2/I3
167 // 1 cycle on I1/I2/I3
173 // 8 cycles on I1/I2/I3
179 // 1 cycle on I0/I1/I2/I3.
185 // 2 cycles on I0/I1/I2/I3.
191 // 3 cycles on I0/I1/I2/I3.
[all …]
/freebsd-11-stable/gnu/usr.bin/cc/cc_tools/
HDarm.md.diff39 output_asm_insn (\"%I3%?\\t%0, %1, %2\", arith);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZInstrFormats.td375 bits<8> I3;
382 let Inst{31-24} = I3;
917 bits<4> I3;
921 let Inst{35-32} = I3;
1039 bits<8> I3;
1046 let Inst{23-16} = I3;
1106 bits<12> I3;
1113 let Inst{31-20} = I3;
1154 bits<8> I3;
1163 let Inst{19-12} = I3;
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
HDSparcCallingConv.td21 CCIfType<[i32, f32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
34 CCIfType<[i32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
HDSparcRegisterInfo.td154 def I3 : Ri<27, "I3">, DwarfRegNum<[27]>;
297 def I2_I3 : Rdi<26, "I2", [I2, I3]>;
HDSparcISelLowering.cpp59 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Split_64()
87 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_Ret_Split_64()
537 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in LowerFormalArguments_32()
1022 .Case("i0", SP::I0).Case("i1", SP::I1).Case("i2", SP::I2).Case("i3", SP::I3) in getRegisterByName()
/freebsd-11-stable/sys/gnu/dts/arm/
HDste-href-family-pinctrl.dtsi648 "GPIO161_D21", /* I3 */
674 "GPIO161_D21", /* I3 */
/freebsd-11-stable/contrib/gdb/gdb/
HDsparc-stub.c113 I0, I1, I2, I3, I4, I5, FP, I7, enumerator
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
HDNVPTXInstrInfo.td166 multiclass I3<string OpcStr, SDNode OpNode> {
521 defm ADD : I3<"add.s", add>;
522 defm SUB : I3<"sub.s", sub>;
533 defm MULT : I3<"mul.lo.s", mul>;
535 defm MULTHS : I3<"mul.hi.s", mulhs>;
536 defm MULTHU : I3<"mul.hi.u", mulhu>;
538 defm SDIV : I3<"div.s", sdiv>;
539 defm UDIV : I3<"div.u", udiv>;
543 defm SREM : I3<"rem.s", srem>;
544 defm UREM : I3<"rem.u", urem>;
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/freebsd-11-stable/contrib/gcc/config/soft-fp/
HDop-4.h523 #define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \ argument
524 (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
HDSparcDisassembler.cpp67 SP::I0, SP::I1, SP::I2, SP::I3,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
HDSparcAsmParser.cpp135 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,
/freebsd-11-stable/contrib/gcc/config/arm/
HDarm.md9551 output_asm_insn (\"%I3%?\\t%0, %1, %2\", arith);
/freebsd-11-stable/contrib/gcc/
HDFSFChangeLog.119613 avoid substituting a return register into I3.
12118 is used between I2 and I3.
HDChangeLog-200131338 I3 having more than one SET.
/freebsd-11-stable/share/misc/
HDpci_vendors23719 0b03 BU-65569I3 MIL-STD-1553 Data Bus