Home
last modified time | relevance | path

Searched refs:I2 (Results 1 – 25 of 64) sorted by relevance

123

/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
HDInstruction.cpp380 static bool haveSameSpecialState(const Instruction *I1, const Instruction *I2, in haveSameSpecialState() argument
382 assert(I1->getOpcode() == I2->getOpcode() && in haveSameSpecialState()
386 return AI->getAllocatedType() == cast<AllocaInst>(I2)->getAllocatedType() && in haveSameSpecialState()
387 (AI->getAlignment() == cast<AllocaInst>(I2)->getAlignment() || in haveSameSpecialState()
390 return LI->isVolatile() == cast<LoadInst>(I2)->isVolatile() && in haveSameSpecialState()
391 (LI->getAlignment() == cast<LoadInst>(I2)->getAlignment() || in haveSameSpecialState()
393 LI->getOrdering() == cast<LoadInst>(I2)->getOrdering() && in haveSameSpecialState()
394 LI->getSyncScopeID() == cast<LoadInst>(I2)->getSyncScopeID(); in haveSameSpecialState()
396 return SI->isVolatile() == cast<StoreInst>(I2)->isVolatile() && in haveSameSpecialState()
397 (SI->getAlignment() == cast<StoreInst>(I2)->getAlignment() || in haveSameSpecialState()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonCopyToCombine.cpp96 void combine(MachineInstr &I1, MachineInstr &I2,
100 bool isSafeToMoveTogether(MachineInstr &I1, MachineInstr &I2,
264 MachineInstr &I2, in isSafeToMoveTogether() argument
268 Register I2UseReg = UseReg(I2.getOperand(1)); in isSafeToMoveTogether()
282 MachineBasicBlock::reverse_iterator I(I2), in isSafeToMoveTogether()
291 if (I2.killsRegister(I2UseReg)) in isSafeToMoveTogether()
321 removeKillInfo(I2, KilledOperand); in isSafeToMoveTogether()
331 MachineBasicBlock::iterator I(I1), End(I2); in isSafeToMoveTogether()
334 End = std::next(MachineBasicBlock::iterator(I2)); in isSafeToMoveTogether()
509 MachineInstr *I2 = findPairable(I1, DoInsertAtI1, OptForSize); in runOnMachineFunction() local
[all …]
HDHexagonVectorLoopCarriedReuse.cpp300 DepChain *getDepChainBtwn(Instruction *I1, Instruction *I2, int Iters);
301 bool isEquivalentOperation(Instruction *I1, Instruction *I2);
403 Instruction *I2) { in isEquivalentOperation() argument
404 if (!I1->isSameOperationAs(I2)) in isEquivalentOperation()
411 if (CallInst *C2 = dyn_cast<CallInst>(I2)) { in isEquivalentOperation()
419 if (I1->getType()->isVectorTy() && I2->getType()->isVectorTy()) { in isEquivalentOperation()
423 ConstantInt *C2 = dyn_cast<ConstantInt>(I2->getOperand(i)); in isEquivalentOperation()
720 Instruction *I2, in getDepChainBtwn() argument
723 if (D->front() == I1 && D->back() == I2 && D->iterations() == Iters) in getDepChainBtwn()
/freebsd-11-stable/contrib/binutils/opcodes/
HDmips-opc.c83 #define I2 INSN_ISA2 macro
248 {"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, 0, I2|T3 },
252 {"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, 0, I2|T3 },
257 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, 0, I2|T3 },
260 {"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, 0, I2|T3 },
261 {"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, 0, I2|T3 },
264 {"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, 0, I2|T3 },
265 {"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, 0, I2|T3 },
268 {"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, 0, I2|T3 },
269 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, 0, I2|T3 },
[all …]
HDia64-opc-i.c27 #define I2 IA64_TYPE_I, 2 macro
174 I2, OpX2TaTbYaXcC (5, 0, a, b, 1, 1, c), {P1, P2, IMMU5b}, EMPTY
176 I2, OpX2TaTbYaXcC (5, 0, a, b, 1, 1, c), {P2, P1, IMMU5b}, PSEUDO, 0, NULL
196 I2, OpX2TaTbYaC (5, 0, a, b, c, d), {P1, P2, R3, POS6}, EMPTY
198 I2, OpX2TaTbYaC (5, 0, a, b, c, d), {P2, P1, R3, POS6}, PSEUDO, 0, NULL
218 I2, OpX2TaTbYaC (5, 0, a, b, c, d), {P1, P2, R3}, EMPTY
220 I2, OpX2TaTbYaC (5, 0, a, b, c, d), {P2, P1, R3}, PSEUDO, 0, NULL
288 #undef I2
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/ADT/
HDAPSInt.h301 static bool isSameValue(const APSInt &I1, const APSInt &I2) { in isSameValue() argument
302 return !compareValues(I1, I2); in isSameValue()
306 static int compareValues(const APSInt &I1, const APSInt &I2) { in compareValues() argument
307 if (I1.getBitWidth() == I2.getBitWidth() && I1.isSigned() == I2.isSigned()) in compareValues()
308 return I1.IsUnsigned ? I1.compare(I2) : I1.compareSigned(I2); in compareValues()
311 if (I1.getBitWidth() > I2.getBitWidth()) in compareValues()
312 return compareValues(I1, I2.extend(I1.getBitWidth())); in compareValues()
313 if (I2.getBitWidth() > I1.getBitWidth()) in compareValues()
314 return compareValues(I1.extend(I2.getBitWidth()), I2); in compareValues()
319 assert(!I2.isSigned() && "Expected signed mismatch"); in compareValues()
[all …]
HDAPInt.h675 static bool isSameValue(const APInt &I1, const APInt &I2) { in isSameValue() argument
676 if (I1.getBitWidth() == I2.getBitWidth()) in isSameValue()
677 return I1 == I2; in isSameValue()
679 if (I1.getBitWidth() > I2.getBitWidth()) in isSameValue()
680 return I1 == I2.zext(I1.getBitWidth()); in isSameValue()
682 return I1.zext(I2.getBitWidth()) == I2; in isSameValue()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDAliasAnalysisEvaluator.cpp148 for (SetVector<Value *>::iterator I2 = Pointers.begin(); I2 != I1; ++I2) { in runInternal() local
150 Type *I2ElTy = cast<PointerType>((*I2)->getType())->getElementType(); in runInternal()
154 AliasResult AR = AA.alias(*I1, I1Size, *I2, I2Size); in runInternal()
157 PrintResults(AR, PrintNoAlias, *I1, *I2, F.getParent()); in runInternal()
161 PrintResults(AR, PrintMayAlias, *I1, *I2, F.getParent()); in runInternal()
165 PrintResults(AR, PrintPartialAlias, *I1, *I2, F.getParent()); in runInternal()
169 PrintResults(AR, PrintMustAlias, *I1, *I2, F.getParent()); in runInternal()
206 for (SetVector<Value *>::iterator I2 = Stores.begin(); I2 != I1; ++I2) { in runInternal() local
208 MemoryLocation::get(cast<StoreInst>(*I2))); in runInternal()
211 PrintLoadStoreResults(AR, PrintNoAlias, *I1, *I2, F.getParent()); in runInternal()
[all …]
HDPostDominators.cpp55 const Instruction *I2) const { in dominates()
56 assert(I1 && I2 && "Expecting valid I1 and I2"); in dominates()
59 const BasicBlock *BB2 = I2->getParent(); in dominates()
65 if (isa<PHINode>(I1) && isa<PHINode>(I2)) in dominates()
70 for (; &*I != I1 && &*I != I2; ++I) in dominates()
73 return &*I == I2; in dominates()
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
HDIdenticalExprChecker.cpp138 while (const IfStmt *I2 = dyn_cast_or_null<IfStmt>(Else)) { in VisitIfStmt() local
139 const Expr *Cond2 = I2->getCond(); in VisitIfStmt()
148 Else = I2->getElse(); in VisitIfStmt()
333 Expr::const_child_iterator I2 = Expr2->child_begin(); in isIdenticalStmt() local
334 while (I1 != Expr1->child_end() && I2 != Expr2->child_end()) { in isIdenticalStmt()
335 if (!*I1 || !*I2 || !isIdenticalStmt(Ctx, *I1, *I2, IgnoreSideEffects)) in isIdenticalStmt()
338 ++I2; in isIdenticalStmt()
344 if (I2 != Expr2->child_end()) in isIdenticalStmt()
438 CompoundStmt::const_body_iterator I2 = CompStmt2->body_begin(); in isIdenticalStmt() local
439 while (I1 != CompStmt1->body_end() && I2 != CompStmt2->body_end()) { in isIdenticalStmt()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/Stages/
HDInstructionTables.cpp54 for (unsigned I2 = 0, E2 = SubUnit.NumUnits; I2 < E2; ++I2) { in execute() local
55 ResourceRef ResourceUnit = std::make_pair(SubUnitIdx, 1U << I2); in execute()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZInstrFormats.td214 bits<4> I2;
219 let Inst{3-0} = I2;
243 bits<16> I2;
248 let Inst{15-0} = I2;
285 bits<16> I2;
291 let Inst{31-16} = I2;
322 bits<8> I2;
330 let Inst{15-8} = I2;
341 bits<16> I2;
346 let Inst{31-16} = I2;
[all …]
HDSystemZInstrInfo.td259 def CallBRASL : Alias<6, (outs), (ins pcrel32:$I2, variable_ops),
260 [(z_call pcrel32:$I2)]>;
268 def TLS_GDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
269 [(z_tls_gdcall tglobaltlsaddr:$I2)]>;
270 def TLS_LDCALL : Alias<6, (outs), (ins tlssym:$I2, variable_ops),
271 [(z_tls_ldcall tglobaltlsaddr:$I2)]>;
277 def CallJG : Alias<6, (outs), (ins pcrel32:$I2),
278 [(z_sibcall pcrel32:$I2)]>;
286 pcrel32:$I2), []>;
295 def CIBCall : Alias<6, (outs), (ins GR32:$R1, imm32sx8:$I2, cond4:$M3), []>;
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64SchedThunderX3T110.td76 // Branch micro-ops on ports I2/I3.
79 // Branch micro-ops on ports I1/I2/I3.
82 // Integer micro-ops on ports I0/I1/I2.
85 // Integer micro-ops on ports I0/I1/I2/I3.
155 // 1 cycle on I2/I3
161 // 8 cycles on I2/I3
167 // 1 cycle on I1/I2/I3
173 // 8 cycles on I1/I2/I3
179 // 1 cycle on I0/I1/I2/I3.
185 // 2 cycles on I0/I1/I2/I3.
[all …]
HDAArch64SchedThunderX2T99.td99 // 1 cycles on I2.
125 // 1 cycle on I0, I1, or I2.
131 // 2 cycles on I0, I1, or I2.
137 // 4 cycles on I0, I1, or I2.
143 // 5 cycles on I0, I1, or I2.
216 // 1 cycles on LS0 or LS1 and I0, I1, or I2.
222 // 1 cycles on LS0 or LS1 and 2 of I0, I1, or I2.
253 // 4 cycles on LS0 or LS1 and I0, I1, or I2.
259 // 4 cycles on LS0 or LS1 and 2 of I0, I1, or I2.
266 // 5 cycles on LS0 or LS1 and I0, I1, or I2.
[all …]
HDAArch64StackTagging.cpp197 auto I2 = Out.find(Offset + 8); in generate() local
198 if (I1 == Out.end() && I2 == Out.end()) in generate()
206 Value *Store2 = I2 == Out.end() ? Constant::getNullValue(IRB.getInt64Ty()) in generate()
207 : I2->second; in generate()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/
HDArgumentPromotion.cpp372 I2 = NF->arg_begin(); in doPromotion() local
377 I->replaceAllUsesWith(&*I2); in doPromotion()
378 I2->takeName(&*I); in doPromotion()
379 ++I2; in doPromotion()
402 I2->setName(I->getName() + "." + Twine(i)); in doPromotion()
403 new StoreInst(&*I2++, Idx, InsertPt); in doPromotion()
433 I2->setName(I->getName() + ".val"); in doPromotion()
434 LI->replaceAllUsesWith(&*I2); in doPromotion()
450 Function::arg_iterator TheArg = I2; in doPromotion()
478 std::advance(I2, ArgIndices.size()); in doPromotion()
HDDeadArgumentElimination.cpp236 I2 = NF->arg_begin(); I != E; ++I, ++I2) { in DeleteDeadVarargs() local
238 I->replaceAllUsesWith(&*I2); in DeleteDeadVarargs()
239 I2->takeName(&*I); in DeleteDeadVarargs()
1017 I2 = NF->arg_begin(); I != E; ++I, ++i) in RemoveDeadStuffFromFunction() local
1021 I->replaceAllUsesWith(&*I2); in RemoveDeadStuffFromFunction()
1022 I2->takeName(&*I); in RemoveDeadStuffFromFunction()
1023 ++I2; in RemoveDeadStuffFromFunction()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86OptimizeLEAs.cpp608 auto I2 = std::next(I1); in removeRedundantLEAs() local
609 while (I2 != List.end()) { in removeRedundantLEAs()
610 MachineInstr &Last = **I2; in removeRedundantLEAs()
620 ++I2; in removeRedundantLEAs()
673 I2 = List.erase(I2); in removeRedundantLEAs()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
HDDWARFVerifier.cpp64 auto I2 = RHS.Ranges.begin(), E2 = RHS.Ranges.end(); in contains() local
65 if (I2 == E2) in contains()
68 DWARFAddressRange R = *I2; in contains()
72 if (++I2 == E2) in contains()
74 R = *I2; in contains()
88 auto I2 = RHS.Ranges.begin(), E2 = RHS.Ranges.end(); in intersects() local
89 while (I1 != E1 && I2 != E2) { in intersects()
90 if (I1->intersects(*I2)) in intersects()
92 if (I1->LowPC < I2->LowPC) in intersects()
95 ++I2; in intersects()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIFixSGPRCopies.cpp459 for (auto I2 = std::next(I1); I2 != E; ) { in hoistAndMergeSGPRInits() local
460 MachineInstr *MI2 = *I2; in hoistAndMergeSGPRInits()
502 ++I2; in hoistAndMergeSGPRInits()
519 ++I2; in hoistAndMergeSGPRInits()
538 ++I2; in hoistAndMergeSGPRInits()
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
HDCodeGenRegisters.cpp952 for (auto I2 = I.base(), E2 = RegClasses.end(); I2 != E2; ++I2) { in computeSubClasses() local
953 CodeGenRegisterClass &SubRC = *I2; in computeSubClasses()
964 for (auto I2 = std::next(I); I2 != E && testSubClass(&RC, &*I2); ++I2) in computeSubClasses() local
965 RC.SubClasses.set(I2->EnumValue); in computeSubClasses()
2318 for (auto I2 = RegClasses.begin(), E2 = std::next(FirstNewRC); I2 != E2; in computeInferredRegisterClasses() local
2319 ++I2) in computeInferredRegisterClasses()
2320 inferMatchingSuperRegClass(&*I2, E2); in computeInferredRegisterClasses()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
HDSimplifyCFG.cpp1220 Instruction *I1, Instruction *I2) { in isSafeToHoistInvoke() argument
1225 if (BB1V != BB2V && (BB1V == I1 || BB2V == I2)) { in isSafeToHoistInvoke()
1251 Instruction *I1 = &*BB1_Itr++, *I2 = &*BB2_Itr++; in HoistThenElseCodeToIf() local
1254 DbgInfoIntrinsic *DBI2 = dyn_cast<DbgInfoIntrinsic>(I2); in HoistThenElseCodeToIf()
1258 while (isa<DbgInfoIntrinsic>(I2)) in HoistThenElseCodeToIf()
1259 I2 = &*BB2_Itr++; in HoistThenElseCodeToIf()
1262 if (isa<PHINode>(I1) || !I1->isIdenticalToWhenDefined(I2) || in HoistThenElseCodeToIf()
1263 (isa<InvokeInst>(I1) && !isSafeToHoistInvoke(BB1, BB2, I1, I2)) || in HoistThenElseCodeToIf()
1282 auto *C2 = dyn_cast<CallInst>(I2); in HoistThenElseCodeToIf()
1287 if (!TTI.isProfitableToHoist(I1) || !TTI.isProfitableToHoist(I2)) in HoistThenElseCodeToIf()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/DebugInfo/MSF/
HDMappedBlockStream.cpp40 static Interval intersect(const Interval &I1, const Interval &I2) { in intersect() argument
41 return std::make_pair(std::max(I1.first, I2.first), in intersect()
42 std::min(I1.second, I2.second)); in intersect()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDRegAllocPBQP.cpp273 const IntervalInfo &I2) { in lowestStartPoint() argument
276 return getStartPoint(I1) > getStartPoint(I2); in lowestStartPoint()
280 const IntervalInfo &I2) { in lowestEndPoint() argument
282 SlotIndex E2 = getEndPoint(I2); in lowestEndPoint()
293 return std::get<0>(I1)->reg < std::get<0>(I2)->reg; in lowestEndPoint()

123