Searched refs:G_SELECT (Results 1 – 21 of 21) sorted by relevance
164 case TargetOpcode::G_SELECT: in isAmbiguous()241 if (MI->getOpcode() == TargetOpcode::G_SELECT) { in AmbiguousRegDefUseContainer()504 case G_SELECT: { in getInstrMapping()636 case TargetOpcode::G_SELECT: in setRegBank()681 case TargetOpcode::G_SELECT: in applyMappingImpl()
122 getActionDefinitionsBuilder(G_SELECT) in MipsLegalizerInfo()
466 case G_SELECT: { in select()
70 def : GINodeEquiv<G_SELECT, select>;
257 case TargetOpcode::G_SELECT: { in computeKnownBitsImpl()
720 return buildInstr(TargetOpcode::G_SELECT, {Res}, {Tst, Op0, Op1}, Flags); in buildSelect()952 case TargetOpcode::G_SELECT: { in buildInstr()
863 case TargetOpcode::G_SELECT: in narrowScalar()1628 case TargetOpcode::G_SELECT: in widenScalar()3068 case G_SELECT: in fewerElementsVector()3359 case TargetOpcode::G_SELECT: in moreElementsVector()
1019 MIRBuilder.buildInstr(TargetOpcode::G_SELECT, {ResRegs[i]}, in translateSelect()
373 case G_SELECT: { in getInstrMapping()
143 getActionDefinitionsBuilder(G_SELECT) in ARMLegalizerInfo()
1035 case G_SELECT: in select()
706 case TargetOpcode::G_SELECT: { in getInstrMapping()
408 getActionDefinitionsBuilder(G_SELECT) in AArch64LegalizerInfo()
2253 case TargetOpcode::G_SELECT: { in select()
586 case TargetOpcode::G_SELECT: { in getInstrAlternativeMappings()1561 case AMDGPU::G_SELECT: { in applyMappingImpl()3267 case AMDGPU::G_SELECT: { in getInstrMapping()
906 getActionDefinitionsBuilder(G_SELECT) in AMDGPULegalizerInfo()
1839 case TargetOpcode::G_SELECT: in select()
395 HANDLE_TARGET_OPCODE(G_SELECT)
326 def G_SELECT : GenericInstruction {
1158 case TargetOpcode::G_SELECT: { in verifyPreISelGenericInstruction()
5119 #define G_SELECT(x) (((x) >> S_SELECT) & M_SELECT) macro