Searched refs:FMAD (Results 1 – 15 of 15) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| HD | ISDOpcodes.h | 360 FMAD, enumerator
|
| HD | TargetLowering.h | 2533 return isOperationLegal(ISD::FMAD, N->getValueType(0)); in isFMADLegalForFAddFSub()
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPUISelLowering.cpp | 517 case ISD::FMAD: in fnegFoldsIntoOp()
1593 (unsigned)ISD::FMAD; in LowerDIVREM24()
1676 unsigned FMAD = MFI->getMode().FP32Denormals ? in LowerUDIVREM64() local
1678 (unsigned)ISD::FMAD; in LowerUDIVREM64()
1682 SDValue Mad1 = DAG.getNode(FMAD, DL, MVT::f32, Cvt_Hi, in LowerUDIVREM64()
1691 SDValue Mad2 = DAG.getNode(FMAD, DL, MVT::f32, Trunc, in LowerUDIVREM64()
3735 case ISD::FMAD: { in performFNegCombine()
|
| HD | SIISelLowering.cpp | 382 setOperationAction(ISD::FMAD, MVT::f32, Legal); in SITargetLowering()
523 setOperationAction(ISD::FMAD, MVT::f16, Legal); in SITargetLowering()
782 return ((Opcode == ISD::FMAD && Subtarget->hasMadMixInsts()) || in isFPExtFoldable()
8598 case ISD::FMAD: in fp16SrcZerosHighBits()
8767 case ISD::FMAD: in isCanonicalized()
9444 isOperationLegal(ISD::FMAD, VT)) in getFusedOpcode()
9445 return ISD::FMAD; in getFusedOpcode()
|
| HD | R600ISelLowering.cpp | 231 setOperationAction(ISD::FMAD, MVT::f32, Legal); in R600TargetLowering()
|
| HD | AMDGPUISelDAGToDAG.cpp | 904 case ISD::FMAD: in Select()
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| HD | SelectionDAGDumper.cpp | 258 case ISD::FMAD: return "fmad"; in getOperationName()
|
| HD | LegalizeFloatTypes.cpp | 2138 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break; in PromoteFloatResult()
|
| HD | TargetLowering.cpp | 5579 case ISD::FMAD: { in isNegatibleForFree()
5689 case ISD::FMAD: { in getNegatedExpression()
|
| HD | DAGCombiner.cpp | 11553 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFADDForFMACombine()
11771 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFSUBForFMACombine()
12065 (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFMULForFMADistributiveCombine()
12072 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFMULForFMADistributiveCombine()
|
| HD | LegalizeDAG.cpp | 3208 case ISD::FMAD: in ExpandNode()
|
| HD | SelectionDAG.cpp | 4136 case ISD::FMAD: { in isKnownNeverNaN()
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| HD | TargetLoweringBase.cpp | 645 setOperationAction(ISD::FMAD, VT, Expand); in initActions()
|
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/ |
| HD | TargetSelectionDAG.td | 439 def fmad : SDNode<"ISD::FMAD" , SDTFPTernaryOp>;
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.cpp | 37246 case ISD::FMAD: in scalarizeExtEltFP()
|