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Searched refs:ExtType (Results 1 – 25 of 51) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonBitTracker.h61 struct ExtType { struct
64 ExtType() = default;
65 ExtType(char t, uint16_t w) : Type(t), Width(w) {} in ExtType() argument
71 using RegExtMap = DenseMap<unsigned, ExtType>;
HDHexagonBitTracker.cpp83 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width))); in HexagonEvaluator()
85 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::ZExt, Width))); in HexagonEvaluator()
1238 if (F->second.Type == ExtType::SExt) in evaluateFormalCopy()
1240 else if (F->second.Type == ExtType::ZExt) in evaluateFormalCopy()
HDHexagonISelDAGToDAG.cpp77 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad() local
78 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in SelectIndexedLoad()
132 auto getExt64 = [this,ExtType] (MachineSDNode *N, const SDLoc &dl) in SelectIndexedLoad()
134 if (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD) { in SelectIndexedLoad()
139 if (ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
150 if (ValueVT == MVT::i64 && ExtType != ISD::NON_EXTLOAD) { in SelectIndexedLoad()
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/
HDCGOpenCLRuntime.cpp64 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in convertOpenCLSpecificType() argument
67 llvm::StructType::create(Ctx, "opencl." #ExtType), AddrSpc); in convertOpenCLSpecificType()
HDCodeGenTypes.cpp504 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in ConvertType() argument
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDTargetLowering.h1064 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
1069 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::LAST_VALUETYPE && in getLoadExtAction()
1071 unsigned Shift = 4 * ExtType; in getLoadExtAction()
1076 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1077 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1082 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegalOrCustom() argument
1083 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
1084 getLoadExtAction(ExtType, ValVT, MemVT) == Custom; in isLoadExtLegalOrCustom()
2011 void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, in setLoadExtAction() argument
2013 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValVT.isValid() && in setLoadExtAction()
[all …]
HDSelectionDAG.h1110 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain,
1115 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1120 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1126 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
HDCombinerHelper.cpp951 LLT ExtType = Ty.getScalarType(); in getMemsetValue() local
952 auto ZExt = MIB.buildZExtOrTrunc(ExtType, Val); in getMemsetValue()
955 auto MagicMI = MIB.buildConstant(ExtType, Magic); in getMemsetValue()
956 Val = MIB.buildMul(ExtType, ZExt, MagicMI).getReg(0); in getMemsetValue()
959 assert(ExtType == Ty && "Vector memset value type not supported yet"); in getMemsetValue()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
HDAArch64InstPrinter.cpp994 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getArithExtendType(Val); in printArithExtend() local
1000 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend()
1004 ExtType == AArch64_AM::UXTX) || in printArithExtend()
1006 ExtType == AArch64_AM::UXTW) ) { in printArithExtend()
1012 O << ", " << AArch64_AM::getShiftExtendName(ExtType); in printArithExtend()
/freebsd-11-stable/contrib/llvm-project/clang/lib/Serialization/
HDASTCommon.cpp215 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in TypeIdxFromBuiltin() argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
HDLegalizeDAG.cpp670 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeLoadOps() local
671 if (ExtType == ISD::NON_EXTLOAD) { in LegalizeLoadOps()
737 TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) == in LegalizeLoadOps()
749 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
757 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
762 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType()) in LegalizeLoadOps()
797 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps()
819 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps()
849 switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0), in LegalizeLoadOps()
883 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps()
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HDLegalizeVectorTypes.cpp1500 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD() local
1512 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
1517 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
1545 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD() local
1574 MMO, MLD->getAddressingMode(), ExtType, in SplitVecRes_MLOAD()
1587 MMO, MLD->getAddressingMode(), ExtType, in SplitVecRes_MLOAD()
3690 ISD::LoadExtType ExtType = LD->getExtensionType(); in WidenVecRes_LOAD() local
3694 if (ExtType != ISD::NON_EXTLOAD) in WidenVecRes_LOAD()
3695 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType); in WidenVecRes_LOAD()
3721 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_MLOAD() local
[all …]
HDLegalizeVectorOps.cpp260 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeOp() local
261 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) { in LegalizeOp()
723 ISD::LoadExtType ExtType = LD->getExtensionType(); in ExpandLoad() local
806 switch (ExtType) { in ExpandLoad()
HDLegalizeIntegerTypes.cpp607 ISD::LoadExtType ExtType = in PromoteIntRes_LOAD() local
610 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD()
2820 ISD::LoadExtType ExtType = N->getExtensionType(); in ExpandIntRes_LOAD() local
2831 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), MemVT, in ExpandIntRes_LOAD()
2837 if (ExtType == ISD::SEXTLOAD) { in ExpandIntRes_LOAD()
2844 } else if (ExtType == ISD::ZEXTLOAD) { in ExpandIntRes_LOAD()
2848 assert(ExtType == ISD::EXTLOAD && "Unknown extload!"); in ExpandIntRes_LOAD()
2864 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, in ExpandIntRes_LOAD()
2881 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), in ExpandIntRes_LOAD()
2907 Hi = DAG.getNode(ExtType == ISD::SEXTLOAD ? ISD::SRA : ISD::SRL, dl, NVT, in ExpandIntRes_LOAD()
HDSelectionDAG.cpp334 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType() argument
335 switch (ExtType) { in getExtForLoadExtType()
3987 unsigned ExtType = LD->getExtensionType(); in ComputeNumSignBits() local
3988 switch (ExtType) { in ComputeNumSignBits()
6794 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad() argument
6816 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); in getLoad()
6819 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad() argument
6824 ExtType = ISD::NON_EXTLOAD; in getLoad()
6825 } else if (ExtType == ISD::NON_EXTLOAD) { in getLoad()
6850 dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO)); in getLoad()
[all …]
HDDAGCombiner.cpp625 bool isLegalNarrowLdSt(LSBaseSDNode *LDSTN, ISD::LoadExtType ExtType,
719 ISD::NodeType ExtType);
1121 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD in PromoteOperand() local
1124 return DAG.getExtLoad(ExtType, DL, PVT, in PromoteOperand()
1355 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD in PromoteLoad() local
1357 SDValue NewLD = DAG.getExtLoad(ExtType, DL, PVT, in PromoteLoad()
4813 ISD::LoadExtType ExtType, EVT &MemVT, in isLegalNarrowLdSt() argument
4854 !TLI.isLoadExtLegal(ExtType, Load->getValueType(0), MemVT)) in isLegalNarrowLdSt()
4872 if (!TLI.shouldReduceLoadWidth(Load, ExtType, MemVT)) in isLegalNarrowLdSt()
9231 ISD::NodeType ExtType) { in ExtendSetCCUses() argument
[all …]
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/Serialization/
HDASTBitCodes.h1021 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDAMDGPUISelLowering.h184 ISD::LoadExtType ExtType,
HDR600ISelLowering.cpp1388 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad() local
1425 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1444 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD() local
1447 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/
HDNSAPI.cpp466 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getNSNumberFactoryMethodKind() argument
HDTypeLoc.cpp394 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getWrittenTypeSpec() argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86InstrInfo.td1104 ISD::LoadExtType ExtType = LD->getExtensionType();
1105 return ExtType == ISD::NON_EXTLOAD || ExtType == ISD::EXTLOAD ||
1106 ExtType == ISD::ZEXTLOAD;
1113 ISD::LoadExtType ExtType = LD->getExtensionType();
1114 if (ExtType == ISD::NON_EXTLOAD)
1116 if (ExtType == ISD::EXTLOAD)
1123 ISD::LoadExtType ExtType = LD->getExtensionType();
1124 if (ExtType == ISD::NON_EXTLOAD)
1126 if (ExtType == ISD::EXTLOAD)
1178 ISD::LoadExtType ExtType = LD->getExtensionType();
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDCodeGenPrepare.cpp235 enum ExtType { enum
245 using TypeIsSExt = PointerIntPair<Type *, 2, ExtType>;
3704 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst()
3727 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType()
6368 Instruction::CastOps ExtType = Instruction::ZExt; in optimizeSwitchInst() local
6371 ExtType = Instruction::SExt; in optimizeSwitchInst()
6373 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType); in optimizeSwitchInst()
6379 APInt WideConst = (ExtType == Instruction::ZExt) ? in optimizeSwitchInst()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64ISelLowering.cpp3468 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; in LowerFormalArguments() local
3483 ExtType = ISD::SEXTLOAD; in LowerFormalArguments()
3486 ExtType = ISD::ZEXTLOAD; in LowerFormalArguments()
3489 ExtType = ISD::EXTLOAD; in LowerFormalArguments()
3494 ExtType, DL, VA.getLocVT(), Chain, FIN, in LowerFormalArguments()
10693 unsigned ExtType = LHS.getOpcode(); in performAddSubLongCombine() local
10702 RHS = DAG.getNode(ExtType, SDLoc(N), VT, RHS); in performAddSubLongCombine()
10708 LHS = DAG.getNode(ExtType, SDLoc(N), VT, LHS); in performAddSubLongCombine()
11763 bool checkValueWidth(SDValue V, unsigned width, ISD::LoadExtType &ExtType) { in checkValueWidth() argument
11764 ExtType = ISD::NON_EXTLOAD; in checkValueWidth()
[all …]
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/AST/
HDType.h2114 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \
2472 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) Id,
6714 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \
6721 #define INTEL_SUBGROUP_AVC_TYPE(ExtType, Id) \
6729 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) is##Id##Type() ||

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