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Searched refs:DstR (Results 1 – 7 of 7) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDRDFCopy.cpp46 RegisterRef DstR = DFG.makeRegRef(Dst.getReg(), Dst.getSubReg()); in interpretAsCopy() local
48 assert(Register::isPhysicalRegister(DstR.Reg)); in interpretAsCopy()
51 if (TRI.getMinimalPhysRegClass(DstR.Reg) != in interpretAsCopy()
54 EM.insert(std::make_pair(DstR, SrcR)); in interpretAsCopy()
HDHexagonFrameLowering.cpp1607 Register DstR = MI->getOperand(0).getReg(); in expandCopy() local
1609 if (!Hexagon::ModRegsRegClass.contains(DstR) || in expandCopy()
1615 BuildMI(B, It, DL, HII.get(TargetOpcode::COPY), DstR) in expandCopy()
1665 Register DstR = MI->getOperand(0).getReg(); in expandLoadInt() local
1679 BuildMI(B, It, DL, HII.get(TfrOpc), DstR) in expandLoadInt()
1732 Register DstR = MI->getOperand(0).getReg(); in expandLoadVecPred() local
1749 BuildMI(B, It, DL, HII.get(Hexagon::V6_vandvrt), DstR) in expandLoadVecPred()
1835 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec2() local
1836 Register DstHi = HRI.getSubReg(DstR, Hexagon::vsub_hi); in expandLoadVec2()
1837 Register DstLo = HRI.getSubReg(DstR, Hexagon::vsub_lo); in expandLoadVec2()
[all …]
HDHexagonRDFOpt.cpp113 auto mapRegs = [&EM] (RegisterRef DstR, RegisterRef SrcR) -> void { in INITIALIZE_PASS_DEPENDENCY() argument
114 EM.insert(std::make_pair(DstR, SrcR)); in INITIALIZE_PASS_DEPENDENCY()
HDHexagonExpandCondsets.cpp214 MachineBasicBlock::iterator At, unsigned DstR,
625 unsigned DstR, unsigned DstSR, const MachineOperand &PredOp, in genCondTfrFor() argument
644 if (RegisterRef(SrcOp) == RegisterRef(DstR, DstSR)) in genCondTfrFor()
647 .addReg(DstR, DstState, DstSR) in genCondTfrFor()
652 .addReg(DstR, DstState, DstSR) in genCondTfrFor()
HDHexagonGenInsert.cpp534 bool isValidInsertForm(unsigned DstR, unsigned SrcR, unsigned InsR,
684 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR, in isValidInsertForm() argument
686 const TargetRegisterClass *DstRC = MRI->getRegClass(DstR); in isValidInsertForm()
HDHexagonSplitDouble.cpp1005 Register DstR = MI->getOperand(0).getReg(); in splitInstr() local
1006 if (MRI->getRegClass(DstR) == DoubleRC) { in splitInstr()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86FixupLEAs.cpp495 const Register DstR = Dst.getReg(); in processInstructionForSlowLEA() local
498 if ((SrcR1 == 0 || SrcR1 != DstR) && (SrcR2 == 0 || SrcR2 != DstR)) in processInstructionForSlowLEA()
508 const MachineOperand &Src = SrcR1 == DstR ? Index : Base; in processInstructionForSlowLEA()
510 BuildMI(MBB, I, MI.getDebugLoc(), ADDrr, DstR).addReg(DstR).add(Src); in processInstructionForSlowLEA()
517 const MachineOperand &SrcR = SrcR1 == DstR ? Base : Index; in processInstructionForSlowLEA()
518 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), ADDri, DstR) in processInstructionForSlowLEA()