Searched refs:DstMask (Results 1 – 3 of 3) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| HD | R600ISelLowering.cpp | 1204 SDValue DstMask = DAG.getNode(ISD::SHL, DL, MVT::i32, Mask, ShiftAmt); in lowerPrivateTruncStore() local
1208 DstMask = DAG.getNOT(DL, DstMask, MVT::i32); in lowerPrivateTruncStore()
1211 Dst = DAG.getNode(ISD::AND, DL, MVT::i32, Dst, DstMask); in lowerPrivateTruncStore()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| HD | RegisterCoalescer.cpp | 1440 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx); in reMaterializeTrivialDef() local
1443 if ((SR.LaneMask & DstMask).none()) { in reMaterializeTrivialDef()
1602 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx); in eliminateUndefCopy() local
1604 if ((SR.LaneMask & DstMask).none()) in eliminateUndefCopy()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelDAGToDAG.cpp | 1934 static bool isBitfieldDstMask(uint64_t DstMask, const APInt &BitsToBeInserted, in isBitfieldDstMask() argument
1940 APInt SignificantDstMask = APInt(BitWidth, DstMask); in isBitfieldDstMask()
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