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Searched refs:DP_TP_CTL (Results 1 – 3 of 3) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/i915/
HDintel_ddi.c202 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
245 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
260 temp = I915_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
263 I915_WRITE(DP_TP_CTL(PORT_E), temp); in hsw_fdi_link_train()
264 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
1276 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_post_disable()
1279 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_post_disable()
1372 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) { in intel_ddi_prepare_link_retrain()
1380 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
1383 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
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HDintel_dp.c1691 temp = I915_READ(DP_TP_CTL(port)); in intel_dp_set_link_train()
1704 I915_WRITE(DP_TP_CTL(port), temp); in intel_dp_set_link_train()
1726 I915_WRITE(DP_TP_CTL(port), temp); in intel_dp_set_link_train()
HDi915_reg.h4496 #define DP_TP_CTL(port) _PORT(port, DP_TP_CTL_A, DP_TP_CTL_B) macro