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Searched refs:AVX (Results 1 – 23 of 23) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86InstrFormats.td487 // AVX instructions have a 'v' prefix in the mnemonic
504 // AVX instructions have a 'v' prefix in the mnemonic
518 // AVX instructions have a 'v' prefix in the mnemonic
533 // AVX instructions have a 'v' prefix in the mnemonic
556 // AVX instructions have a 'v' prefix in the mnemonic
567 // VSSI - SSE1 instructions with XS prefix in AVX form.
568 // VPSI - SSE1 instructions with PS prefix in AVX form, packed single.
601 // VSDI - SSE2 scalar instructions with XD prefix in AVX form.
602 // VPDI - SSE2 vector instructions with PD prefix in AVX form,
604 // VS2I - SSE2 scalar instructions with PD prefix in AVX form.
[all …]
HDX86.td118 def FeatureAVX : SubtargetFeature<"avx", "X86SSELevel", "AVX",
119 "Enable AVX instructions",
131 "Enable AVX-512 instructions",
134 "Enable AVX-512 Exponential and Reciprocal Instructions",
137 "Enable AVX-512 Conflict Detection Instructions",
140 "true", "Enable AVX-512 Population Count Instructions",
143 "Enable AVX-512 PreFetch Instructions",
149 "Enable AVX-512 Doubleword and Quadword Instructions",
152 "Enable AVX-512 Byte and Word Instructions",
155 "Enable AVX-512 Vector Length eXtensions",
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HDX86CallingConv.td223 // Boolean vectors of AVX-512 are returned in SIMD registers.
224 // The call from AVX to AVX-512 function should work,
225 // since the boolean types in AVX/AVX2 are promoted by default.
241 // supported while using the AVX target feature.
247 // supported while using the AVX-512 target feature.
531 // Boolean vectors of AVX-512 are passed in SIMD registers.
532 // The call from AVX to AVX-512 function should work,
533 // since the boolean types in AVX/AVX2 are promoted by default.
684 // AVX
688 // AVX-512
[all …]
HDX86RegisterInfo.td251 // YMM0-15 registers, used by AVX instructions and
252 // YMM16-31 registers, used by AVX-512 instructions.
260 // ZMM Registers, used by AVX-512 instructions.
268 // Mask Registers, used by AVX-512 instructions.
576 // AVX-512 vector/mask registers.
584 // Scalar AVX-512 floating point registers.
589 // Extended VR128 and VR256 for AVX-512 instructions
HDX86Subtarget.h64 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
600 bool hasAVX() const { return X86SSELevel >= AVX; } in hasAVX()
HDX86ScheduleBtVer2.td25 // FIXME: SSE4/AVX is unimplemented. This flag is set to allow
797 // AVX instructions.
825 // SSE2/AVX Store Selected Bytes of Double Quadword - (V)MASKMOVDQ
987 // AVX Zero-idioms.
1020 // AVX
1039 // AVX variants.
HDX86ScheduleBdVer2.td1273 // AVX instructions.
1387 // AVX Zero-idioms.
1419 // AVX
HDX86InstrAVX512.td403 // Alias instruction that maps zero vector to pxor / xorp* for AVX-512.
474 // AVX-512 - VECTOR INSERT
770 // AVX-512 VECTOR EXTRACT
1097 // AVX-512 BROADCAST
1462 // AVX-512 BROADCAST SUBVECTORS
1720 // AVX-512 BROADCAST MASK TO VECTOR REGISTER
1950 // AVX-512 - BLEND using mask
3317 // With AVX-512 only, 8-bit mask is promoted to 16-bit mask.
3366 // AVX-512 - Aligned and unaligned load and store
3947 // AVX-512 MOVSS, MOVSD
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HDX86InstrSSE.td124 // AVX & SSE - Zero/One Vectors
147 // The same as done above but for AVX. The 256-bit AVX1 ISA doesn't support PI,
211 // AVX
1169 // AVX aliases
1691 // AVX register conversion intrinsics
2747 // Repeat for AVX versions of the instructions.
2783 /// For the non-AVX defs, we need $src1 to be tied to $dst because
3022 // Repeat for AVX versions of the instructions.
3041 // Repeat for AVX versions of the instructions.
3117 // There is no AVX form for instructions below this point
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HDX86ScheduleSLM.td481 // AVX/FMA is not supported on that architecture, but we should define the basic
HDX86InstrInfo.td689 // Unsigned immediate used by SSE/AVX instructions
728 // Unsigned 8-bit immediate used by SSE/AVX instructions.
744 // Used by some SSE/AVX instructions that use intrinsics.
2992 // SIMD support (SSE, MMX and AVX)
/freebsd-11-stable/contrib/llvm-project/clang/lib/Basic/Targets/
HDX86.cpp483 case AVX: in setSSELevel()
533 case AVX: in setSSELevel()
596 setSSELevel(Features, AVX, true); in setXOPLevel()
655 setSSELevel(Features, AVX, Enabled); in setFeatureEnabledImpl()
665 setSSELevel(Features, AVX, Enabled); in setFeatureEnabledImpl()
672 setSSELevel(Features, AVX, Enabled); in setFeatureEnabledImpl()
693 setSSELevel(Features, AVX, Enabled); in setFeatureEnabledImpl()
704 setSSELevel(Features, AVX, Enabled); in setFeatureEnabledImpl()
865 .Case("+avx", AVX) in handleTargetFeatures()
1259 case AVX: in getTargetDefines()
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HDX86.h52 AVX, enumerator
299 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX) in getABI()
/freebsd-11-stable/crypto/openssl/doc/crypto/
HDOPENSSL_ia32cap.pod54 =item bit #60 denoting AVX extension;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDVFABIDemangling.cpp39 .Case("c", VFISAKind::AVX) in tryParseISA()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
HDVectorUtils.h48 AVX, // x86 AVX enumerator
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDCommandFlags.inc346 // not all Sandybridge processors support AVX.
366 // not all Sandybridge processors support AVX.
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/Windows/
HDSignals.inc232 // at AVX registers, which typically aren't needed by StackWalk64. Reduce the
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/
HDTargetSchedule.td108 // extensions, (e.g. Pentium 4 doesn't have AVX) or implementation
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/Basic/
HDBuiltinsX86.def472 // AVX
878 // AVX-512
HDAttrDocs.td2181 passed in sequential SSE registers if enough are available. If AVX is enabled,
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/
HDTargetInfo.cpp2038 AVX, enumerator
2047 case X86AVXABILevel::AVX: in getNativeVectorSizeForAVXABI()
10003 : ABI == "avx" ? X86AVXABILevel::AVX : X86AVXABILevel::None); in getTargetCodeGenInfo()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/
HDIntrinsicsX86.td918 // AVX
4101 // AVX-512 conflict detection instruction