| /freebsd-11-stable/crypto/openssl/crypto/sha/asm/ |
| HD | sha256-586.pl | 364 my @AH=($A,$K256); 369 &mov ($AH[0],&DWP(0,"esi")); 370 &mov ($AH[1],&DWP(4,"esi")); 374 &mov (&DWP(4,"esp"),$AH[1]); 375 &xor ($AH[1],"ecx"); # magic 447 &mov ($t1,$AH[0]); 451 &mov ($t2,$AH[0]); 453 &xor ($t1,$AH[0]); 454 &mov (&off($a),$AH[0]); # save $A, modulo-scheduled 455 &xor ($AH[0],"edi"); # a ^= b, (b^c) in next round [all …]
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| /freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
| HD | dfdiv.S | 12 #define AH r1 macro 81 EXPBA = combine(BH,AH) 82 SIGN = xor(AH,BH) 85 #undef AH 208 #define AH r1 macro 218 AH += asl(EXPA,#DF_MANTBITS-32) 224 AH += asl(EXPA,#DF_MANTBITS-32) 225 EXPB = extractu(AH,#DF_EXPBITS,#DF_MANTBITS-32) 283 AH += asl(TMP,#DF_MANTBITS-32) 329 AH = mux(Q_POSITIVE,#0,#-1) define [all …]
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| HD | dfmul.S | 11 #define AH r1 macro 113 EXP0 = extractu(AH,#EXPBITS,#HI_MANTBITS) 119 TMP = xor(AH,BH) 133 AH += asl(EXP0,#HI_MANTBITS) 150 p0 = bitsclr(AH,BTMPL) 177 AH += asl(EXP1,#HI_MANTBITS) 178 EXP1 = extractu(AH,#EXPBITS,#HI_MANTBITS) 232 AH = insert(S_ZERO,#EXPBITS,#HI_MANTBITS) define 253 AH = insert(S_ZERO,#EXPBITS-1,#HI_MANTBITS+1) // Insert correct exponent define 271 PP_LL_L ^= lsr(AH,#31) // Does sign match rounding? [all …]
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| HD | dfaddsub.S | 12 #define AH r1 macro 79 EXPA = extractu(AH,#EXPBITS,#HI_MANTBITS) 111 A_POS = cmp.gt(AH,#-1) 148 AH += asl(EXPB,#HI_MANTBITS) 174 if (p0.new) AH = xor(AH,BH) 199 TMP = extractu(AH,#EXPBITS,#HI_MANTBITS) 200 AH += asl(EXPB,#HI_MANTBITS) 241 EXPB ^= lsr(AH,#31) // Does sign match rounding? 292 EXPA = extractu(AH,#EXPBITS,#HI_MANTBITS) 315 p0 = cmp.gt(AH,#-1) [all …]
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| HD | dffma.S | 16 #define AH r1 macro 149 TMP = xor(AH,BH) 152 EXPA = extractu(AH,#EXPBITS,#HI_MANTBITS) 319 AH += asl(EXPA,#HI_MANTBITS) 336 if (p0.new) AH = ##0x80000000 360 AH += asl(EXPA,#HI_MANTBITS) 361 NEW_EXPB = extractu(AH,#EXPBITS,#HI_MANTBITS) 408 AH = USR define 428 if (!p1.new) AH = or(AH,AL) 433 USR = AH [all …]
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| HD | dfsqrt.S | 14 #define AH r1 macro 81 EXP = extractu(AH,#DF_EXPBITS,#DF_MANTBITS-32) 86 NORMAL = cmp.gt(AH,#-1) // and positive? 99 #undef AH 339 #define AH r1 macro 361 P_TMP = cmp.gt(AH,#-1) 382 AH = insert(EXP,#1,#DF_MANTBITS-32) // insert lsb of exponent define
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| /freebsd-11-stable/share/examples/IPv6/ |
| HD | USAGE | 397 complicated example. From HOST A to HOST B, only old AH is used. 398 From HOST B to HOST A, new AH and new ESP are combined. 400 Now we should choose algorithm to be used corresponding to "AH"/"new 401 AH"/"ESP"/"new ESP". Please refer to the "setkey" man page to know 402 algorithm names. Our choice is MD5 for AH, new-HMAC-SHA1 for new AH, 420 (1)PROTO=AH 431 PROTO=AH 432 ALG=new-HMAC-SHA1(new AH) 470 the "ping" command has the -P option with parameter to enable AH and/or ESP. 478 to be AH transport mode inner ESP tunnel mode like below. [all …]
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| /freebsd-11-stable/sbin/setkey/ |
| HD | sample.cf | 33 # security protocol (AH or ESP) identifier. You must take care of these 63 # Security protocol is old AH tunnel mode, i.e. RFC1826, with keyed-md5 67 # ======= AH ======= 101 # AH transport mode followed by ESP tunnel mode is required between 104 # is hmac-sha1. Authentication algorithm for AH is hmac-md5. 106 # ========== AH =========
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| HD | X86MCTargetDesc.cpp | 93 {codeview::RegisterId::AH, X86::AH}, in initLLVMToSEHAndCVRegMapping() 615 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero() 616 return X86::AH; in getX86SubSuperRegisterOrZero() 627 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero() 664 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero() 700 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero() 736 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
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| /freebsd-11-stable/release/picobsd/mfs_tree/etc/ |
| HD | protocols | 10 ah 51 AH # authentication header
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| HD | X86RegisterInfo.td | 58 def AH : X86Reg<"ah", 4>; 115 def AX : X86Reg<"ax", 0, [AL,AH]>; 384 // FIXME: Allow AH, CH, DH, BH to be used as general-purpose registers in 390 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL, 392 let AltOrders = [(sub GR8, AH, BH, CH, DH)]; 444 def GR8_ABCD_H : RegisterClass<"X86", [i8], 8, (add AH, CH, DH, BH)>; 457 (add AL, CL, DL, AH, CH, DH, BL, BH)> { 458 let AltOrders = [(sub GR8_NOREX, AH, BH, CH, DH)];
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| HD | X86InstrArithmetic.td | 58 // AL,AH = AL*GR8 83 // AL,AH = AL*[mem8] 109 // AL,AH = AL*GR8 127 // AL,AH = AL*[mem8] 283 let Defs = [AL,AH,EFLAGS], Uses = [AX] in 284 def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH 298 let Defs = [AL,AH,EFLAGS], Uses = [AX] in 299 def DIV8m : I<0xF6, MRM6m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH 315 let Defs = [AL,AH,EFLAGS], Uses = [AX] in 316 def IDIV8r : I<0xF6, MRM7r, (outs), (ins GR8:$src), // AX/r8 = AL,AH [all …]
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| HD | X86CallingConv.td | 207 // requires the values to be in AL and AH, however this code uses AL and DL 208 // instead. This is because using AH for the second register conflicts with 210 // up in AX and AH, which overlap. Front-ends wishing to conform to the ABI 212 // values into an i16 (which uses AX, and thus AL:AH).
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| HD | X86InstructionSelector.cpp | 1573 {X86::IDIV8r, 0, X86::MOVSX16rr8, X86::AH, S}, // SRem in selectDivRem() 1575 {X86::DIV8r, 0, X86::MOVZX16rr8, X86::AH, U}, // URem in selectDivRem() 1690 OpEntry.DivRemResultReg == X86::AH && STI.is64Bit()) { in selectDivRem()
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| HD | RewriteStatepointsForGC.cpp | 2384 static void RemoveNonValidAttrAtIndex(LLVMContext &Ctx, AttrHolder &AH, in RemoveNonValidAttrAtIndex() argument 2387 if (AH.getDereferenceableBytes(Index)) in RemoveNonValidAttrAtIndex() 2389 AH.getDereferenceableBytes(Index))); in RemoveNonValidAttrAtIndex() 2390 if (AH.getDereferenceableOrNullBytes(Index)) in RemoveNonValidAttrAtIndex() 2392 AH.getDereferenceableOrNullBytes(Index))); in RemoveNonValidAttrAtIndex() 2393 if (AH.getAttributes().hasAttribute(Index, Attribute::NoAlias)) in RemoveNonValidAttrAtIndex() 2397 AH.setAttributes(AH.getAttributes().removeAttributes(Ctx, Index, R)); in RemoveNonValidAttrAtIndex()
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| /freebsd-11-stable/share/doc/IPv6/ |
| HD | IMPLEMENTATION | 73 4.3 AH and ESP handling 939 in supporting AH with jumbograms (AH header size influences payload length, 941 option as well as AH). 1798 (3) AH, ESP and IPComp handling in kernel 1831 IP AH ESP IP payload 1832 some implementation proposes it as "AH transport and ESP tunnel", since 1834 implementation proposes it as "AH tunnel and ESP tunnel". 1842 4.3 AH and ESP handling 1845 processing. When sending a packet, ip{,6}_output() checks if ESP/AH 1847 Policy Database) is found. If ESP/AH is needed, [all …]
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| /freebsd-11-stable/contrib/llvm-project/clang/include/clang/Sema/ |
| HD | Lookup.h | 275 void setAllowHidden(bool AH) { in setAllowHidden() argument 276 AllowHidden = AH; in setAllowHidden()
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| /freebsd-11-stable/share/syscons/fonts/ |
| HD | iso02-8x16.fnt | 74 M/`P&?`!L.``\9L+`P,#"9CP`````#!@`_F9B8'A@8F;^````````_F9B:'AH
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| HD | cp1251-8x16.fnt | 67 M```````&?GY@8&!@````````````A,S\S,;`P,```````'SHZ.AH*"@H*"@`
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| /freebsd-11-stable/contrib/libpcap/ |
| HD | grammar.y | 334 %token IPV6 ICMPV6 AH ESP 527 | AH { $$ = Q_AH; }
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| HD | scanner.l | 276 ah return AH;
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| /freebsd-11-stable/etc/ |
| HD | protocols | 61 ah 51 AH # authentication header
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| HD | X86DisassemblerDecoder.h | 83 ENTRY(AH) \
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
| HD | CodeViewRegisters.def | 55 CV_REGISTER(AH, 5)
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Target/ |
| HD | TargetSchedule.td | 491 // onwards), where AL and AH are not treated as independent from AX, and AX is 494 // a write to AL cannot go in parallel with a write to AH.
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