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Searched refs:subregs (Results 1 – 25 of 31) sorted by relevance

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/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
DMipsRegisterInfo.td35 class MipsRegWithSubRegs<bits<16> Enc, string n, list<Register> subregs>
36 : RegisterWithSubRegs<n, subregs> {
45 class Mips64GPRReg<bits<16> Enc, string n, list<Register> subregs>
46 : MipsRegWithSubRegs<Enc, n, subregs> {
54 class AFPR<bits<16> Enc, string n, list<Register> subregs>
55 : MipsRegWithSubRegs<Enc, n, subregs> {
60 class AFPR64<bits<16> Enc, string n, list<Register> subregs>
61 : MipsRegWithSubRegs<Enc, n, subregs> {
67 class AFPR128<bits<16> Enc, string n, list<Register> subregs>
68 : MipsRegWithSubRegs<Enc, n, subregs> {
[all …]
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td20 class HexagonDoubleReg<string n, list<Register> subregs> :
21 RegisterWithSubRegs<n, subregs> {
38 class Rd<bits<5> num, string n, list<Register> subregs> :
39 HexagonDoubleReg<n, subregs> {
41 let SubRegs = subregs;
/freebsd-10-stable/contrib/llvm/lib/Target/R600/
DR600RegisterInfo.td19 class R600Reg_128<string n, list<Register> subregs, bits<16> encoding> :
20 RegisterWithSubRegs<n, subregs> {
26 class R600Reg_64<string n, list<Register> subregs, bits<16> encoding> :
27 RegisterWithSubRegs<n, subregs> {
/freebsd-10-stable/contrib/llvm/lib/Target/MSP430/
DMSP430RegisterInfo.td19 class MSP430RegWithSubregs<bits<4> num, string n, list<Register> subregs>
20 : RegisterWithSubRegs<n, subregs> {
/freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.td18 class SystemZRegWithSubregs<string n, list<Register> subregs>
19 : RegisterWithSubRegs<n, subregs> {
114 // Not used directly, but needs to exist for ADDR32 and ADDR64 subregs
DSystemZInstrInfo.td1334 // Use subregs to populate the "don't care" bits in a 32-bit to 64-bit anyext.
/freebsd-10-stable/contrib/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td38 class Rd<bits<16> Enc, string n, list<Register> subregs> : SparcReg<Enc, n> {
39 let SubRegs = subregs;
45 class Rq<bits<16> Enc, string n, list<Register> subregs> : SparcReg<Enc, n> {
46 let SubRegs = subregs;
/freebsd-10-stable/contrib/llvm/lib/Target/ARM/
DARMRegisterInfo.td15 class ARMReg<bits<16> Enc, string n, list<Register> subregs = []> : Register<n> {
18 let SubRegs = subregs;
292 // 32-bit SPR subregs).
309 // Subset of QPR that have 32-bit SPR subregs.
313 // Subset of QPR that have DPR_8 and SPR_8 subregs.
/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td42 class AArch64RegWithSubs<bits<16> enc, string n, list<Register> subregs = [],
45 let SubRegs = subregs;
/freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td56 class CR<bits<3> num, string n, list<Register> subregs> : PPCReg<n> {
58 let SubRegs = subregs;
/freebsd-10-stable/contrib/llvm/lib/Target/X86/
DX86RegisterInfo.td16 class X86Reg<string n, bits<16> Enc, list<Register> subregs = []> : Register<n> {
19 let SubRegs = subregs;
DX86InstrCompiler.td1129 // For other extloads, use subregs, since the high contents of the register are
/freebsd-10-stable/contrib/llvm/include/llvm/Target/
DTarget.td132 // List "subregs" specifies which registers are sub-registers to this one. This
136 class RegisterWithSubRegs<string n, list<Register> subregs> : Register<n> {
137 let SubRegs = subregs;
/freebsd-10-stable/contrib/gcc/config/rs6000/
Dpredicates.md729 /* Do not allow invalid E500 subregs. */
Drs6000.md3393 not handle invalid E500 subregs. */
9790 ;; Disallow subregs for E500 so we don't munge frob_di_df_2.
/freebsd-10-stable/contrib/gcc/
DChangeLog-20012332 instead of hardcoding subregs into the _be and _le patterns.
3024 * flow.c (find_regno_partial): Find subregs within an expression.
8716 * i386.c (test splitter): Narrow tests vs paradoxical subregs.
12565 (simplify_comparison): Don't simplify subregs from INT to FP.
15371 * dbxout.c (dbxout_symbol_location): Flatten subregs first;
21360 paradoxical subregs.
21396 * simplify_rtx.c (simplify_subreg): Keep subregs on return values,
21399 subregs of frame pointer if reload completed and frame pointer
22515 subregs containing mem.
22709 * simplify-rtx.c (simplify_subreg): Avoid creating of incorrect subregs.
[all …]
DChangeLog-2006181 SImode subregs of SPE vectors.
182 * config/rs6000/rs6000.md (insv): Fail for invalid E500 subregs.
183 * jump.c (true_regnum): Require subregs to satisfy
272 invalid E500 subregs.
273 (rs6000_nonimmediate_operand): Check for invalid E500 subregs also
275 * config/rs6000/rs6000.c (invalid_e500_subreg): Check for subregs
276 involving DFmode if TARGET_E500_DOUBLE. Check for subregs
5247 big-endian paradoxical subregs.
5442 handle subregs.
6684 * expmed.c (store_bit_field): Handle paradoxical subregs on big endian
[all …]
DChangeLog-20021020 * i386.md (cmove splitters): Avoid creation of unnecesary subregs.
1313 generate unnecesary subregs.
2578 condition to accept the same operands and/or subregs.
2701 generate unnecesary subregs.
3115 * jump.c (mark_jump_label): Handle subregs of label_refs.
3988 when simplifying subregs of constants.
4005 * i386.md (abs splitters): Do not produce nested subregs.
6020 * reload.c (push_reload): Handle subregs and secondary memory.
6025 * unroll.c (find_splittable_givs): Handle subregs.
12548 from individual subregs, check that each subreg has been generated
[all …]
DChangeLog1619 * pa.md (muldi3): Force subregs to registers in 64-bit expander.
DChangeLog-19992466 containing subregs too.
12984 * regclass.c (scan_one_insn): Notice subregs that change the
15266 * alpha.c (print_operand_address): here. Handle subregs.
15283 (GO_IF_LEGITIMATE_SIMPLE_ADDRESS): Handle normal subregs.
15676 for subregs of pseudos.
15683 (normal_memory_operand): Likewise. Handle subregs of pseudos.
DChangeLog-1997498 subregs of identical word size for push_reload.
DChangeLog-1998339 * emit-rtl.c (subreg_realpart_p): Cope with subregs containing
4284 * expmed.c (store_bit_field): Don't take subregs of subregs in
11645 * combine.c (nonzero_bits): For paradoxical subregs, take
/freebsd-10-stable/contrib/gcc/doc/
Dloop.texi376 rtx_iv}. In order to handle subregs, the representation is a bit
/freebsd-10-stable/contrib/gcc/config/i386/
Dsse.md831 ;; conditional move. Using subregs into vector modes causes register
1776 ;; conditional move. Using subregs into vector modes causes register
/freebsd-10-stable/contrib/gcc/config/arm/
Darm.c3216 int subregs = 0; in legitimize_pic_address() local
3268 subregs = 1; in legitimize_pic_address()
3276 if (subregs) in legitimize_pic_address()

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