Searched refs:gpio_mmio_base (Results 1 – 2 of 2) sorted by relevance
144 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0); in intel_iic_reset()241 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer_read()278 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer_write()333 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer_index_read()376 reg_offset = dev_priv->gpio_mmio_base; in intel_gmbus_transfer()633 sc->reg = dev_priv->gpio_mmio_base + gmbus_ports[pin].reg; in intel_iicbb_attach()716 dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA; in intel_setup_gmbus()718 dev_priv->gpio_mmio_base = 0; in intel_setup_gmbus()
298 uint32_t gpio_mmio_base; member