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Searched refs:bus_write_1 (Results 1 – 25 of 82) sorted by relevance

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/freebsd-10-stable/sys/dev/ichsmb/
Dichsmb.c124 bus_write_1(sc->io_res, ICH_HST_STA, 0xff); in ichsmb_attach()
184 bus_write_1(sc->io_res, ICH_XMIT_SLVA, in ichsmb_quick()
187 bus_write_1(sc->io_res, ICH_HST_CNT, in ichsmb_quick()
210 bus_write_1(sc->io_res, ICH_XMIT_SLVA, in ichsmb_sendb()
212 bus_write_1(sc->io_res, ICH_HST_CMD, byte); in ichsmb_sendb()
213 bus_write_1(sc->io_res, ICH_HST_CNT, in ichsmb_sendb()
232 bus_write_1(sc->io_res, ICH_XMIT_SLVA, in ichsmb_recvb()
234 bus_write_1(sc->io_res, ICH_HST_CNT, in ichsmb_recvb()
255 bus_write_1(sc->io_res, ICH_XMIT_SLVA, in ichsmb_writeb()
257 bus_write_1(sc->io_res, ICH_HST_CMD, cmd); in ichsmb_writeb()
[all …]
/freebsd-10-stable/sys/dev/ieee488/
Dupd7210.c85 bus_write_1(u->reg_res[reg], u->reg_offset[reg], val); in upd7210_wr()
135 bus_write_1(u->irq_clear_res, 0, 42); in upd7210intr()
188 bus_write_1(u->reg_res[0], cnt0, -1); in gpib_l_irq()
189 bus_write_1(u->reg_res[0], cnt1, (-1) >> 8); in gpib_l_irq()
190 bus_write_1(u->reg_res[0], cnt2, (-1) >> 16); in gpib_l_irq()
191 bus_write_1(u->reg_res[0], cnt3, (-1) >> 24); in gpib_l_irq()
192 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */ in gpib_l_irq()
205 bus_write_1(u->reg_res[0], imr3, 0x00); in gpib_l_irq()
246 bus_write_1(u->reg_res[0], cmdr, 0x10); /* reset FIFO */ in gpib_l_open()
247 bus_write_1(u->reg_res[0], cfg, 0x20); /* xfer IN, 8-bit FIFO */ in gpib_l_open()
[all …]
Dibfoo.c235 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */ in gpib_ib_irq()
246 bus_write_1(u->reg_res[0], fifob, *ib->buf); in gpib_ib_irq()
253 bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */ in gpib_ib_irq()
256 bus_write_1(u->reg_res[0], imr3, 0x11); /* STOP IE, DONE IE */ in gpib_ib_irq()
264 bus_write_1(u->reg_res[0], imr3, 0x00); in gpib_ib_irq()
265 bus_write_1(u->reg_res[0], cmdr, 0x22); /* soft RESET */ in gpib_ib_irq()
306 bus_write_1(u->reg_res[0], imr3, 0x00); in gpib_ib_timeout()
307 bus_write_1(u->reg_res[0], cmdr, 0x22); /* soft RESET */ in gpib_ib_timeout()
349 bus_write_1(u->reg_res[0], imr3, 0x00); in gpib_ib_wait_xfer()
411 bus_write_1(u->reg_res[0], cmdr, 0x10); /* reset FIFO */ in pio_cmd()
[all …]
Dtnt4882.c190 bus_write_1(sc->res[1], tp->reg, tp->val); in tst_exec()
268 bus_write_1(sc->res[1], imr3, 0x02); in tnt_attach()
285 bus_write_1(sc->res[0], hssel, 0x01); /* one-chip mode */ in tnt_attach()
Dpcii.c188 bus_write_1(sc->res[2 + 3], 0, 0x55); in pcii_probe()
193 bus_write_1(sc->res[2 + 3], 0, 0xaa); in pcii_probe()
/freebsd-10-stable/sys/pci/
Dintpm.c124 bus_write_1(res, 0, reg); /* Index */ in amd_pmio_read()
340 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, PIIX4_SMBSLVCNT_ALTEN); in intsmb_attach()
408 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, 0); in intsmb_free()
411 bus_write_1(sc->io_res, PIIX4_SMBHSTSTS, in intsmb_free()
430 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, in intsmb_intr()
456 bus_write_1(sc->io_res, PIIX4_SMBSLVSTS, in intsmb_slvintr()
474 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, in intsmb_alrintr()
485 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, SMBALTRESP | LSB); in intsmb_alrintr()
496 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, in intsmb_alrintr()
516 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, tmp); in intsmb_start()
[all …]
/freebsd-10-stable/sys/dev/puc/
Dpucdata.c1355 bus_write_1(bar->b_res, REG_SPR, REG_ACR); in puc_config_advantech()
1356 bus_write_1(bar->b_res, REG_ICR, acr); in puc_config_advantech()
1468 bus_write_1(bar->b_res, REG_LCR, LCR_DLAB); in puc_config_quatech()
1469 bus_write_1(bar->b_res, REG_SPR, 0); in puc_config_quatech()
1471 bus_write_1(bar->b_res, REG_SPR, 0x80 + -cfg->clock); in puc_config_quatech()
1473 bus_write_1(bar->b_res, REG_LCR, 0); in puc_config_quatech()
1560 bus_write_1(bar->b_res, 0x250, 0x89); in puc_config_syba()
1561 bus_write_1(bar->b_res, 0x3f0, 0x87); in puc_config_syba()
1562 bus_write_1(bar->b_res, 0x3f0, 0x87); in puc_config_syba()
1566 bus_write_1(bar->b_res, efir, 0x09); in puc_config_syba()
[all …]
/freebsd-10-stable/sys/dev/iir/
Diir_pci.c239 bus_write_1(gdt->sc_dpmem, GDT_EDOOR_EN, in iir_pci_attach()
241 bus_write_1(gdt->sc_dpmem, GDT_MPR_EDOOR, 0xff); in iir_pci_attach()
242 bus_write_1(gdt->sc_dpmem, GDT_MPR_IC + GDT_S_STATUS, 0); in iir_pci_attach()
243 bus_write_1(gdt->sc_dpmem, GDT_MPR_IC + GDT_CMD_INDEX, 0); in iir_pci_attach()
247 bus_write_1(gdt->sc_dpmem, GDT_MPR_IC + GDT_S_CMD_INDX, 0xff); in iir_pci_attach()
248 bus_write_1(gdt->sc_dpmem, GDT_MPR_LDOOR, 1); in iir_pci_attach()
263 bus_write_1(gdt->sc_dpmem, GDT_MPR_IC + GDT_S_STATUS, 0); in iir_pci_attach()
278 bus_write_1(gdt->sc_dpmem, GDT_MPR_IC + GDT_S_CMD_INDX, 0xfe); in iir_pci_attach()
279 bus_write_1(gdt->sc_dpmem, GDT_MPR_LDOOR, 1); in iir_pci_attach()
292 bus_write_1(gdt->sc_dpmem, GDT_MPR_IC + GDT_S_STATUS, 0); in iir_pci_attach()
[all …]
/freebsd-10-stable/sys/arm/samsung/s3c2xx0/
Ds3c24x0_rtc.c77 bus_write_1(sc->mem_res, RTC_RTCCON, RTCCON_RTCEN); in s3c2xx0_rtc_attach()
132 bus_write_1(sc->mem_res, RTC_BCDSEC, TOBCD(ct.sec)); in s3c2xx0_rtc_settime()
133 bus_write_1(sc->mem_res, RTC_BCDMIN, TOBCD(ct.min)); in s3c2xx0_rtc_settime()
134 bus_write_1(sc->mem_res, RTC_BCDHOUR, TOBCD(ct.hour)); in s3c2xx0_rtc_settime()
135 bus_write_1(sc->mem_res, RTC_BCDDATE, TOBCD(ct.day)); in s3c2xx0_rtc_settime()
136 bus_write_1(sc->mem_res, RTC_BCDDAY, TOBCD(ct.dow)); in s3c2xx0_rtc_settime()
137 bus_write_1(sc->mem_res, RTC_BCDMON, TOBCD(ct.mon)); in s3c2xx0_rtc_settime()
138 bus_write_1(sc->mem_res, RTC_BCDYEAR, TOBCD(ct.year - YEAR_BASE)); in s3c2xx0_rtc_settime()
/freebsd-10-stable/sys/dev/ata/chipsets/
Data-fsl.c157 bus_write_1(ctrl->r_res1, 0x00, 3); in imx_ata_ch_attach()
158 bus_write_1(ctrl->r_res1, 0x01, 3); in imx_ata_ch_attach()
159 bus_write_1(ctrl->r_res1, 0x02, (25 + 15) / 15); in imx_ata_ch_attach()
160 bus_write_1(ctrl->r_res1, 0x03, (70 + 15) / 15); in imx_ata_ch_attach()
163 bus_write_1(ctrl->r_res1, 0x04, (70 + 15) / 15); in imx_ata_ch_attach()
164 bus_write_1(ctrl->r_res1, 0x05, (50 + 15) / 15 + 2); in imx_ata_ch_attach()
165 bus_write_1(ctrl->r_res1, 0x06, 1); in imx_ata_ch_attach()
166 bus_write_1(ctrl->r_res1, 0x07, (10 + 15) / 15); in imx_ata_ch_attach()
169 bus_write_1(ctrl->r_res1, 0x08, (10 + 15) / 15); in imx_ata_ch_attach()
/freebsd-10-stable/sys/dev/ppc/
Dppcreg.h171 #define w_dtr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_DTR, byte))
172 #define w_str(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_STR, byte))
173 #define w_ctr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_CTR, byte))
175 #define w_epp_A(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_EPP_ADDR, byte))
176 #define w_epp_D(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_EPP_DATA, byte))
177 #define w_ecr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_ECP_ECR, byte))
178 #define w_fifo(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_ECP_D_FIFO, byte))
/freebsd-10-stable/sys/dev/mlx/
Dmlxreg.h81 #define MLX_V3_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V3_MAILBOX + idx, val)
85 #define MLX_V3_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IDBR, val)
87 #define MLX_V3_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_ODBR, val)
88 #define MLX_V3_PUT_IER(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IER, val)
90 #define MLX_V3_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_FWERROR, val)
118 #define MLX_V4_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V4_MAILBOX + idx, val)
127 #define MLX_V4_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V4_FWERROR, val)
163 #define MLX_V5_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V5_MAILBOX + idx, val)
167 #define MLX_V5_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_IDBR, val)
169 #define MLX_V5_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_ODBR, val)
[all …]
/freebsd-10-stable/sys/dev/glxiic/
Dglxiic.c501 bus_write_1(sc->smb_res, GLXIIC_SMB_STS, (GLXIIC_SMB_STS_SLVSTP_BIT | in glxiic_read_status_locked()
518 bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1, in glxiic_stop_locked()
531 bus_write_1(sc->smb_res, GLXIIC_SMB_STS, in glxiic_stop_locked()
667 bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, data); in glxiic_state_slave_tx_callback()
748 bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, slave); in glxiic_state_master_addr_callback()
753 bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1, in glxiic_state_master_addr_callback()
782 bus_write_1(sc->smb_res, GLXIIC_SMB_STS, in glxiic_state_master_tx_callback()
791 bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, *sc->data++); in glxiic_state_master_tx_callback()
824 bus_write_1(sc->smb_res, GLXIIC_SMB_STS, in glxiic_state_master_rx_callback()
844 bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1, in glxiic_state_master_rx_callback()
[all …]
/freebsd-10-stable/sys/sparc64/ebus/
Depic.c82 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, (off));\
94 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, (off));\
98 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_WRITE_MASK, \
103 bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_DATA, (val));\
/freebsd-10-stable/sys/powerpc/powermac/
Dmacio.c672 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); in macio_enable_wireless()
674 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); in macio_enable_wireless()
682 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); in macio_enable_wireless()
683 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); in macio_enable_wireless()
684 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); in macio_enable_wireless()
685 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); in macio_enable_wireless()
686 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); in macio_enable_wireless()
Dmacgpio.c295 bus_write_1(sc->sc_gpios,dinfo->gpio_num,val); in macgpio_activate_resource()
319 bus_write_1(sc->sc_gpios,dinfo->gpio_num,val); in macgpio_deactivate_resource()
352 bus_write_1(sc->sc_gpios,dinfo->gpio_num,val); in macgpio_write()
Datibl.c165 bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, in atibl_pll_rreg()
187 bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, in atibl_pll_wreg()
/freebsd-10-stable/sys/dev/asmc/
Dasmcvar.h60 bus_write_1(sc->sc_ioport, 0x00, val)
68 bus_write_1(sc->sc_ioport, 0x04, val)
/freebsd-10-stable/sys/dev/pcf/
Dpcfvar.h101 bus_write_1(sc->res_ioport, 0, data); in pcf_set_S0()
109 bus_write_1(sc->res_ioport, 1, data); in pcf_set_S1()
/freebsd-10-stable/sys/dev/ipmi/
Dipmivars.h200 #define bus_write_1(r, o, v) \ macro
208 bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)
214 bus_write_1((sc)->ipmi_io_res[(x)], 0, value)
/freebsd-10-stable/sys/dev/an/
Dif_anreg.h52 #define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->port_res, reg, val)
63 #define CSR_MEM_WRITE_1(sc, reg, val) bus_write_1(sc->mem_res, reg, val)
77 bus_write_1(sc->mem_aux_res, reg, val)
/freebsd-10-stable/sys/dev/le/
Dif_le_lebuffer.c164 bus_write_1(lesc->sc_bres, off, *from); in le_lebuffer_copytodesc()
195 bus_write_1(lesc->sc_bres, off + 1, *from); in le_lebuffer_copytobuf()
219 bus_write_1(lesc->sc_bres, off + 1, 0); in le_lebuffer_zerobuf()
/freebsd-10-stable/sys/dev/amdsbwd/
Damdsbwd.c132 bus_write_1(res, 0, reg); /* Index */ in pmio_read()
139 bus_write_1(res, 0, reg); /* Index */ in pmio_write()
140 bus_write_1(res, 1, val); /* Data */ in pmio_write()
/freebsd-10-stable/sys/dev/xe/
Dif_xevar.h81 #define XE_OUTB(r, b) bus_write_1(scp->port_res, (r), (b))
/freebsd-10-stable/sys/dev/bm/
Dif_bmreg.h160 bus_write_1(sc->sc_memr, reg, val)

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