Searched refs:VXGE_HAL_VPATH_INTR_RX (Results 1 – 4 of 4) sorted by relevance
1359 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] | in vxge_hal_device_intr_enable()1375 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] | in vxge_hal_device_intr_enable()1436 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] | in vxge_hal_device_intr_disable()1447 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] | in vxge_hal_device_intr_disable()2247 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0) { in vxge_hal_device_mask_rx()2250 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX], in vxge_hal_device_mask_rx()2254 if (hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX] != 0) { in vxge_hal_device_mask_rx()2257 hldev->tim_int_mask1[VXGE_HAL_VPATH_INTR_RX], in vxge_hal_device_mask_rx()2289 if (hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX] != 0) { in vxge_hal_device_clear_rx()2292 hldev->tim_int_mask0[VXGE_HAL_VPATH_INTR_RX], in vxge_hal_device_clear_rx()[all …]
8995 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_RX]); in __hal_vpath_tim_configure()9065 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_RX]); in __hal_vpath_tim_configure()9071 &vpath->vp_reg->tim_cfg2_int_num[VXGE_HAL_VPATH_INTR_RX]); in __hal_vpath_tim_configure()9104 &vpath->vp_reg->tim_cfg2_int_num[VXGE_HAL_VPATH_INTR_RX]); in __hal_vpath_tim_configure()9108 &vpath->vp_reg->tim_cfg3_int_num[VXGE_HAL_VPATH_INTR_RX]); in __hal_vpath_tim_configure()9152 &vpath->vp_reg->tim_cfg3_int_num[VXGE_HAL_VPATH_INTR_RX]); in __hal_vpath_tim_configure()9673 (vp_id * VXGE_HAL_MAX_INTR_PER_VP) + VXGE_HAL_VPATH_INTR_RX; in __hal_vp_initialize()11980 &vpath->vp_reg->tim_cfg3_int_num[VXGE_HAL_VPATH_INTR_RX]); in vxge_hal_vpath_dynamic_rti_rtimer_set()12065 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_RX]); in vxge_hal_vpath_rti_ci_set()12073 &vpath->vp_reg->tim_cfg1_int_num[VXGE_HAL_VPATH_INTR_RX]); in vxge_hal_vpath_rti_ci_set()[all …]
127 #define VXGE_HAL_INTR_RX (1<<(3-VXGE_HAL_VPATH_INTR_RX))
46 #define VXGE_HAL_VPATH_INTR_RX 1 macro