Searched refs:VSYNC (Results 1 – 8 of 8) sorted by relevance
280 /* VGA_HSYNC, VSYNC with max drive strength */
243 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
339 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
233 0x0E0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
515 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
353 vsync_reg = VSYNC(pipe); in intel_crt_load_detect()
2879 I915_WRITE(TRANS_VSYNC(pipe), I915_READ(VSYNC(pipe))); in ironlake_pch_enable()4161 I915_WRITE(VSYNC(pipe), in i9xx_crtc_mode_set()4735 I915_WRITE(VSYNC(pipe), in ironlake_crtc_mode_set()5647 int vsync = I915_READ(VSYNC(pipe)); in intel_crtc_mode_get()7209 error->pipe[i].vsync = I915_READ(VSYNC(i)); in intel_display_capture_error_state()
1535 #define VSYNC(pipe) _PIPE(pipe, _VSYNC_A, _VSYNC_B) macro