Searched refs:VLD (Results 1 – 5 of 5) sorted by relevance
| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3726 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local 3727 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP() 3731 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP() 3748 cast<ConstantSDNode>(VLD->getOperand(NumVecs + 3))->getZExtValue(); in CombineVLDDUP() 3749 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP() 3767 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP() 3768 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP() 3769 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, Ops, 2, in CombineVLDDUP() 3774 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP() 3790 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9469 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local 9470 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP() 9474 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP() 9491 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP() 9492 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP() 9510 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP() 9511 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP() 9512 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP() 9517 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP() 9533 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
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| D | ARMInstrNEON.td | 579 // Classes for VLD* pseudo-instructions with multi-register operands. 962 // Classes for VLD*LN pseudo-instructions with multi-register operands.
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| D | ARMInstrInfo.td | 990 // Special version of addrmode6 to handle alignment encoding for VLD-dup
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| /freebsd-10-stable/contrib/binutils/gas/ |
| D | ChangeLog-2006 | 1891 register lists for VLD<n>/VST<n> instructions.
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