| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 488 { ISD::UREM, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
492 { ISD::UREM, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
496 { ISD::UREM, MVT::v4i16, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
500 { ISD::UREM, MVT::v8i8, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
505 { ISD::UREM, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
509 { ISD::UREM, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
513 { ISD::UREM, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
517 { ISD::UREM, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
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| D | ARMISelLowering.cpp | 149 setOperationAction(ISD::UREM, VT, Expand); in addTypeForNEON()
692 setOperationAction(ISD::UREM, MVT::i32, Expand); in ARMTargetLowering()
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| /freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 176 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 147 setOperationAction(ISD::UREM, MVT::i32, Expand); in AMDGPUTargetLowering()
172 setOperationAction(ISD::UREM, VT, Expand); in AMDGPUTargetLowering()
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| D | AMDILISelLowering.cpp | 623 SDValue r20 = DAG.getNode(ISD::UREM, DL, OVT, r0, r1); in LowerSREM32()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1111 setOperationAction(ISD::UREM, MVT::i32, Expand); in HexagonTargetLowering()
1114 setOperationAction(ISD::UREM, MVT::i64, Expand); in HexagonTargetLowering()
1331 setOperationAction(ISD::UREM, MVT::i32, Expand); in HexagonTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.h | 697 void visitURem(const User &I) { visitBinary(I, ISD::UREM); } in visitURem()
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| D | SelectionDAGDumper.cpp | 161 case ISD::UREM: return "urem"; in getOperationName()
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| D | FastISel.cpp | 417 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in SelectBinaryOp()
1003 return SelectBinaryOp(I, ISD::UREM); in SelectOperator()
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| D | LegalizeVectorOps.cpp | 199 case ISD::UREM: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 113 case ISD::UREM: in ScalarizeVectorResult()
580 case ISD::UREM: in SplitVectorResult()
1533 case ISD::UREM: in WidenVectorResult()
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| D | SelectionDAG.cpp | 2162 case ISD::UREM: { in ComputeMaskedBits()
2833 case ISD::UREM: in FoldConstantArithmetic()
2940 case ISD::UREM: in getNode()
3267 case ISD::UREM: in getNode()
3295 case ISD::UREM: in getNode()
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| D | LegalizeIntegerTypes.cpp | 113 case ISD::UREM: Res = PromoteIntRes_UDIV(N); break; in PromoteIntegerResult()
1123 case ISD::UREM: ExpandIntRes_UREM(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | LegalizeDAG.cpp | 2053 OtherOpcode = isDIV ? ISD::UREM : ISD::UDIV; in useDivRem()
3377 case ISD::UREM: in ExpandNode()
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| D | DAGCombiner.cpp | 1136 case ISD::UREM: return visitUREM(N); in visit()
2067 return DAG.getNode(ISD::UREM, SDLoc(N), VT, N0, N1); in visitSREM()
2104 return DAG.FoldConstantArithmetic(ISD::UREM, VT, N0C, N1C); in visitUREM()
2366 SDValue Res = SimplifyNodeWithTwoResults(N, ISD::UDIV, ISD::UREM); in visitUDIVREM()
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| /freebsd-10-stable/contrib/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 156 setOperationAction(ISD::UREM, MVT::i8, Expand); in MSP430TargetLowering()
162 setOperationAction(ISD::UREM, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 833 case ISD::UREM: in canOpTrap()
1263 case URem: return ISD::UREM; in InstructionOpcodeToISD()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 187 setOperationAction(ISD::UREM, Ty, Legal); in addMSAIntType()
1879 return DAG.getNode(ISD::UREM, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
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| D | MipsISelLowering.cpp | 280 setOperationAction(ISD::UREM, MVT::i32, Expand); in MipsTargetLowering()
284 setOperationAction(ISD::UREM, MVT::i64, Expand); in MipsTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1405 setOperationAction(ISD::UREM, MVT::i32, Expand); in SparcTargetLowering()
1412 setOperationAction(ISD::UREM, MVT::i64, Expand); in SparcTargetLowering()
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 327 def urem : SDNode<"ISD::UREM" , SDTIntBinOp>;
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 144 setOperationAction(ISD::UREM, MVT::i32, Expand); in AArch64TargetLowering()
145 setOperationAction(ISD::UREM, MVT::i64, Expand); in AArch64TargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 111 setOperationAction(ISD::UREM, MVT::i32, Expand); in PPCTargetLowering()
113 setOperationAction(ISD::UREM, MVT::i64, Expand); in PPCTargetLowering()
394 setOperationAction(ISD::UREM, VT, Expand); in PPCTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 133 setOperationAction(ISD::UREM, VT, Expand); in SystemZTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.td | 541 defm UREM : I3<"rem.u", urem>;
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