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Searched refs:UINT_TO_FP (Results 1 – 25 of 25) sorted by relevance

/freebsd-10-stable/contrib/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp239 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
242 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
244 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
246 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
248 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
250 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
252 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
254 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
256 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
258 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
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DARMISelLowering.cpp111 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in addTypeForNEON()
116 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON()
563 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering()
862 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering()
3683 case ISD::UINT_TO_FP: in LowerVectorINT_TO_FP()
3685 Opc = ISD::UINT_TO_FP; in LowerVectorINT_TO_FP()
3706 case ISD::UINT_TO_FP: in LowerINT_TO_FP()
6123 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG); in LowerOperation()
9664 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
/freebsd-10-stable/contrib/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp369 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 2*10 }, in getCastInstrCost()
370 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v4i32, 4*10 }, in getCastInstrCost()
371 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v8i16, 8*10 }, in getCastInstrCost()
372 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 }, in getCastInstrCost()
378 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v2i64, 15 }, in getCastInstrCost()
379 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 15 }, in getCastInstrCost()
380 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v8i16, 15 }, in getCastInstrCost()
381 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost()
427 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 }, in getCastInstrCost()
428 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 }, in getCastInstrCost()
[all …]
DX86ISelLowering.cpp315 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); in resetOperationActions()
316 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); in resetOperationActions()
317 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); in resetOperationActions()
320 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); in resetOperationActions()
321 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in resetOperationActions()
325 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in resetOperationActions()
328 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom); in resetOperationActions()
857 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in resetOperationActions()
1025 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Custom); in resetOperationActions()
1026 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in resetOperationActions()
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/freebsd-10-stable/contrib/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp141 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AMDGPUTargetLowering()
171 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in AMDGPUTargetLowering()
273 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG); in LowerOperation()
721 SDValue FloatLo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, Lo); in LowerUINT_TO_FP()
724 SDValue FloatHi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, Hi); in LowerUINT_TO_FP()
DR600ISelLowering.cpp1507 if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) { in PerformDAGCombine()
1508 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), N->getValueType(0), in PerformDAGCombine()
/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp258 case ISD::UINT_TO_FP: in LegalizeOp()
272 case ISD::UINT_TO_FP: in LegalizeOp()
295 else if (Node->getOpcode() == ISD::UINT_TO_FP) in LegalizeOp()
366 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND : in PromoteVectorOpINT_TO_FP()
DLegalizeDAG.cpp1181 case ISD::UINT_TO_FP: in LegalizeOp()
2388 SDValue Fcvt = DAG.getNode(ISD::UINT_TO_FP, dl, MVT::f64, Trunc); in ExpandLegalINT_TO_FP()
2393 SDValue Fcvt2 = DAG.getNode(ISD::UINT_TO_FP, dl, MVT::f64, Lo); in ExpandLegalINT_TO_FP()
2472 if (TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, NewInTy)) { in PromoteLegalINT_TO_FP()
2473 OpToUse = ISD::UINT_TO_FP; in PromoteLegalINT_TO_FP()
2984 case ISD::UINT_TO_FP: in ExpandNode()
3874 if (Node->getOpcode() == ISD::UINT_TO_FP || in PromoteNode()
3924 case ISD::UINT_TO_FP: in PromoteNode()
DSelectionDAGDumper.cpp223 case ISD::UINT_TO_FP: return "uint_to_fp"; in getOperationName()
DLegalizeVectorTypes.cpp93 case ISD::UINT_TO_FP: in ScalarizeVectorResult()
553 case ISD::UINT_TO_FP: in SplitVectorResult()
1158 case ISD::UINT_TO_FP: in SplitVectorOperand()
1555 case ISD::UINT_TO_FP: in WidenVectorResult()
2353 case ISD::UINT_TO_FP: in WidenVectorOperand()
DLegalizeFloatTypes.cpp100 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; in SoftenFloatResult()
840 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; in ExpandFloatResult()
DDAGCombiner.cpp1175 case ISD::UINT_TO_FP: return visitUINT_TO_FP(N); in visit()
6548 TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT)) { in visitSINT_TO_FP()
6551 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); in visitSINT_TO_FP()
6600 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); in visitUINT_TO_FP()
6604 if (!TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT) && in visitUINT_TO_FP()
9626 (Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP)) { in reduceBuildVecConvertToConvertBuildVec()
9649 assert((Opcode == ISD::UINT_TO_FP || Opcode == ISD::SINT_TO_FP) in reduceBuildVecConvertToConvertBuildVec()
DLegalizeIntegerTypes.cpp801 case ISD::UINT_TO_FP: Res = PromoteIntOp_UINT_TO_FP(N); break; in PromoteIntegerOperand()
2490 case ISD::UINT_TO_FP: Res = ExpandIntOp_UINT_TO_FP(N); break; in ExpandIntegerOperand()
DSelectionDAG.cpp2524 case ISD::UINT_TO_FP: in getNode()
DSelectionDAGBuilder.cpp2912 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurSDLoc(), DestVT, N)); in visitUIToFP()
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
DISDOpcodes.h368 UINT_TO_FP, enumerator
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1157 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering()
1162 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering()
1167 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
1172 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); in HexagonTargetLowering()
1177 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Legal); in HexagonTargetLowering()
1192 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in HexagonTargetLowering()
/freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp217 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in PPCTargetLowering()
317 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in PPCTargetLowering()
335 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in PPCTargetLowering()
341 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in PPCTargetLowering()
453 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); in PPCTargetLowering()
4867 (Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
4869 (Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
4956 Ld = DAG.getMemIntrinsicNode(Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
5798 case ISD::UINT_TO_FP: in LowerOperation()
/freebsd-10-stable/contrib/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1426 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering()
1428 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in SparcTargetLowering()
2806 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG, *this, in LowerOperation()
3208 case ISD::UINT_TO_FP: in ReplaceNodeResults()
/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp260 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in AArch64TargetLowering()
261 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering()
262 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering()
2873 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG, false); in LowerOperation()
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1284 case UIToFP: return ISD::UINT_TO_FP; in InstructionOpcodeToISD()
/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp196 setOperationAction(ISD::UINT_TO_FP, Ty, Legal); in addMSAIntType()
1708 return DAG.getNode(ISD::UINT_TO_FP, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
DMipsISelLowering.cpp292 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in MipsTargetLowering()
293 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in MipsTargetLowering()
/freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp178 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); in SystemZTargetLowering()
179 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in SystemZTargetLowering()
/freebsd-10-stable/contrib/llvm/include/llvm/Target/
DTargetSelectionDAG.td393 def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;