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Searched refs:TB (Results 1 – 25 of 79) sorted by relevance

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/freebsd-10-stable/contrib/llvm/lib/Target/X86/
DX86InstrSystem.td19 TB;
22 def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", []>, TB;
27 def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
28 def UD2B : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
32 def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", [], IIC_RSM>, TB;
54 def SYSCALL : I<0x05, RawFrm, (outs), (ins), "syscall", [], IIC_SYSCALL>, TB;
55 def SYSRET : I<0x07, RawFrm, (outs), (ins), "sysret{l}", [], IIC_SYSCALL>, TB;
56 def SYSRET64 :RI<0x07, RawFrm, (outs), (ins), "sysret{q}", [], IIC_SYSCALL>, TB,
60 IIC_SYS_ENTER_EXIT>, TB;
63 IIC_SYS_ENTER_EXIT>, TB;
[all …]
DX86InstrVMX.td33 def VMCALL : I<0x01, MRM_C1, (outs), (ins), "vmcall", []>, TB;
35 "vmclear\t$vmcs", []>, OpSize, TB;
37 def VMFUNC : I<0x01, MRM_D4, (outs), (ins), "vmfunc", []>, TB;
39 def VMLAUNCH : I<0x01, MRM_C2, (outs), (ins), "vmlaunch", []>, TB;
41 def VMRESUME : I<0x01, MRM_C3, (outs), (ins), "vmresume", []>, TB;
43 "vmptrld\t$vmcs", []>, TB;
45 "vmptrst\t$vmcs", []>, TB;
47 "vmread{q}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In64BitMode]>;
49 "vmread{q}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In64BitMode]>;
51 "vmread{l}\t{$src, $dst|$dst, $src}", []>, TB, Requires<[In32BitMode]>;
[all …]
DX86InstrSVM.td19 def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;
22 def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;
25 def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;
29 def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|eax}", []>, TB;
34 "vmrun\t{%eax|eax}", []>, TB, Requires<[In32BitMode]>;
37 "vmrun\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
42 "vmload\t{%eax|eax}", []>, TB, Requires<[In32BitMode]>;
45 "vmload\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
50 "vmsave\t{%eax|eax}", []>, TB, Requires<[In32BitMode]>;
53 "vmsave\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
[all …]
DX86InstrExtension.td45 TB, OpSize, Sched<[WriteALU]>;
49 TB, OpSize, Sched<[WriteALULd]>;
53 [(set GR32:$dst, (sext GR8:$src))], IIC_MOVSX>, TB,
57 [(set GR32:$dst, (sextloadi32i8 addr:$src))], IIC_MOVSX>, TB,
61 [(set GR32:$dst, (sext GR16:$src))], IIC_MOVSX>, TB,
66 TB, Sched<[WriteALULd]>;
71 TB, OpSize, Sched<[WriteALU]>;
75 TB, OpSize, Sched<[WriteALULd]>;
79 [(set GR32:$dst, (zext GR8:$src))], IIC_MOVZX>, TB,
83 [(set GR32:$dst, (zextloadi32i8 addr:$src))], IIC_MOVZX>, TB,
[all …]
DX86InstrCMovSetCC.td25 IIC_CMOV16_RR>,TB,OpSize;
31 IIC_CMOV32_RR>, TB;
37 IIC_CMOV32_RR>, TB;
47 TB, OpSize;
52 CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
57 CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
87 IIC_SET_R>, TB, Sched<[WriteALU]>;
91 IIC_SET_M>, TB, Sched<[WriteALU, WriteStore]>;
DX86InstrFormats.td121 class TB { bits<5> Prefix = 1; }
399 // PSI - SSE1 instructions with TB prefix.
400 // PSIi8 - SSE1 instructions with ImmT == Imm8 and TB prefix.
402 // VPSI - SSE1 instructions with TB prefix in AVX form, packed single.
412 : I<o, F, outs, ins, asm, pattern, itin, SSEPackedSingle>, TB,
416 : Ii8<o, F, outs, ins, asm, pattern, itin, SSEPackedSingle>, TB,
424 : I<o, F, outs, ins, !strconcat("v", asm), pattern, itin, SSEPackedSingle>, TB,
433 // PDI - SSE2 instructions with TB and OpSize prefixes, packed double domain.
434 // PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
436 // VPDI - SSE2 vector instructions with TB and OpSize prefixes in AVX form,
[all …]
DX86InstrInfo.td849 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize;
851 "nop{l}\t$zero", [], IIC_NOP>, TB;
977 [(set GR32:$dst, (bswap GR32:$src))], IIC_BSWAP>, TB;
981 [(set GR64:$dst, (bswap GR64:$src))], IIC_BSWAP>, TB;
989 IIC_BIT_SCAN_REG>, TB, OpSize, Sched<[WriteShift]>;
993 IIC_BIT_SCAN_MEM>, TB, OpSize, Sched<[WriteShiftLd]>;
997 IIC_BIT_SCAN_REG>, TB,
1002 IIC_BIT_SCAN_MEM>, TB, Sched<[WriteShiftLd]>;
1006 IIC_BIT_SCAN_REG>, TB, Sched<[WriteShift]>;
1010 IIC_BIT_SCAN_MEM>, TB, Sched<[WriteShiftLd]>;
[all …]
DX86InstrTSX.td31 "xend", [(int_x86_xend)]>, TB, Requires<[HasRTM]>;
35 "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>;
DX86InstrShiftRotate.td705 TB, OpSize;
711 TB, OpSize;
716 IIC_SHD32_REG_CL>, TB;
721 IIC_SHD32_REG_CL>, TB;
727 TB;
733 TB;
743 TB, OpSize;
750 TB, OpSize;
757 TB;
764 TB;
[all …]
DX86InstrSSE.td813 TB, VEX;
816 TB, OpSize, VEX;
819 TB, VEX;
822 TB, OpSize, VEX;
826 TB, VEX, VEX_L;
829 TB, OpSize, VEX, VEX_L;
832 TB, VEX, VEX_L;
835 TB, OpSize, VEX, VEX_L;
838 TB;
841 TB, OpSize;
[all …]
DX86Instr3DNow.td16 : I<o, F, outs, ins, asm, pat>, TB, Requires<[Has3DNow]> {
95 [(prefetch addr:$addr, (i32 1), (i32 3), (i32 1))]>, TB,
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp373 MachineBasicBlock *TB = 0, *FB = 0; in findInductionRegister() local
374 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false); in findInductionRegister()
481 MachineBasicBlock *TB = 0, *FB = 0; in getLoopTripCount() local
482 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false); in getLoopTripCount()
490 assert (TB && "Latch block without a branch?"); in getLoopTripCount()
491 assert ((!FB || TB == Header || FB == Header) && "Branches not to header?"); in getLoopTripCount()
492 if (!TB || (FB && TB != Header && FB != Header)) in getLoopTripCount()
499 bool Negated = (Cond.size() > 1) ^ (TB != Header); in getLoopTripCount()
1295 MachineBasicBlock *TB = 0, *FB = 0; in fixupInductionVariable() local
1298 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false); in fixupInductionVariable()
[all …]
/freebsd-10-stable/contrib/groff/contrib/mom/examples/
Dtypesetting.mom84 .TB 3 \" Notice that from here on, we use the alias TB instead of TAB
88 .TB 4
91 .TB 5
100 .TB 1
106 .TB 2
109 .TB 3
119 .TB 4
123 .TB 5
405 .TB 1
412 .TB 1
[all …]
/freebsd-10-stable/contrib/groff/font/devX75-12/
DMakefile.sub2 DEVFILES=DESC TR TI TB TBI CR CI CB CBI HR HI HB HBI NR NI NB NBI S
/freebsd-10-stable/contrib/groff/font/devX75/
DMakefile.sub2 DEVFILES=DESC TR TI TB TBI CR CI CB CBI HR HI HB HBI NR NI NB NBI S
/freebsd-10-stable/contrib/groff/font/devX100/
DMakefile.sub2 DEVFILES=DESC TR TI TB TBI CR CI CB CBI HR HI HB HBI NR NI NB NBI S
/freebsd-10-stable/contrib/groff/font/devX100-12/
DMakefile.sub2 DEVFILES=DESC TR TI TB TBI CR CI CB CBI HR HI HB HBI NR NI NB NBI S
/freebsd-10-stable/gnu/usr.bin/groff/font/devlbp/
DMakefile6 TB TBI TI TR CR CB CI ER EB EI
/freebsd-10-stable/contrib/groff/font/devlbp/
DMakefile.sub6 TB TBI TI TR \
/freebsd-10-stable/bin/ls/tests/
Dls_tests.sh80 TB=$(( 1024 * $GB ))
81 PB=$(( 1024 * $TB ))
95 for filesize in $MB $GB $TB; do
560 elif [ $file_size -lt $TB ]; then
564 divisor=$TB
/freebsd-10-stable/contrib/libarchive/libarchive/test/
Dtest_tar_large.c74 #define TB ((int64_t)1024 * GB) macro
200 256 * GB, 1 * TB, 0 }; in DEFINE_TEST()
/freebsd-10-stable/gnu/usr.bin/groff/font/devlj4/
DMakefile9 LGB LGI LGR OB OBI OI OR TB TBI TI TR \
/freebsd-10-stable/contrib/groff/font/devdvi/
DMakefile.sub3 TR TI TB TBI CW CWI HR HI HB HBI \
/freebsd-10-stable/gnu/usr.bin/groff/font/devdvi/
DMakefile5 TR TI TB TBI CW CWI HR HI HB HBI \
/freebsd-10-stable/contrib/groff/font/devlj4/
DMakefile.sub12 TB TBI TI TR \

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