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Searched refs:SU (Results 1 – 25 of 64) sorted by relevance

123

/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.cpp43 bool VLIWResourceModel::isResourceAvailable(SUnit *SU) { in isResourceAvailable() argument
44 if (!SU || !SU->getInstr()) in isResourceAvailable()
49 switch (SU->getInstr()->getOpcode()) { in isResourceAvailable()
51 if (!ResourcesModel->canReserveResources(SU->getInstr())) in isResourceAvailable()
75 if (I->getSUnit() == SU) in isResourceAvailable()
83 bool VLIWResourceModel::reserveResources(SUnit *SU) { in reserveResources() argument
86 if (!SU) { in reserveResources()
94 if (!isResourceAvailable(SU)) { in reserveResources()
101 switch (SU->getInstr()->getOpcode()) { in reserveResources()
103 ResourcesModel->reserveResources(SU->getInstr()); in reserveResources()
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DHexagonMachineScheduler.h88 bool isResourceAvailable(SUnit *SU);
89 bool reserveResources(SUnit *SU);
115 SUnit *SU; member
123 SchedCandidate(): SU(NULL), SCost(0) {} in SchedCandidate()
176 bool checkHazard(SUnit *SU);
178 void releaseNode(SUnit *SU, unsigned ReadyCycle);
182 void bumpNode(SUnit *SU);
186 void removeReady(SUnit *SU);
213 virtual void schedNode(SUnit *SU, bool IsTopNode);
215 virtual void releaseTopNode(SUnit *SU);
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/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp71 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU() argument
73 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in numberRCValPredInSU()
108 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, in numberRCValSuccInSU() argument
111 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberRCValSuccInSU()
146 static unsigned numberCtrlDepsInSU(SUnit *SU) { in numberCtrlDepsInSU() argument
148 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberCtrlDepsInSU()
156 static unsigned numberCtrlPredInSU(SUnit *SU) { in numberCtrlPredInSU() argument
158 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in numberCtrlPredInSU()
174 SUnit *SU = &(*SUnits)[i]; in initNodes() local
175 initNumRegDefsLeft(SU); in initNodes()
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DScheduleDAGRRList.cpp185 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable() argument
186 return Topo.IsReachable(SU, TargetSU); in IsReachable()
191 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle() argument
192 return Topo.WillCreateCycle(SU, TargetSU); in WillCreateCycle()
198 void AddPred(SUnit *SU, const SDep &D) { in AddPred() argument
199 Topo.AddPred(SU, D.getSUnit()); in AddPred()
200 SU->addPred(D); in AddPred()
206 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred() argument
207 Topo.RemovePred(SU, D.getSUnit()); in RemovePred()
208 SU->removePred(D); in RemovePred()
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DScheduleDAGSDNodes.cpp78 SUnit *SU = &SUnits.back(); in newSUnit() local
83 SU->SchedulingPref = Sched::None; in newSUnit()
85 SU->SchedulingPref = TLI.getSchedulingPreference(N); in newSUnit()
86 return SU; in newSUnit()
90 SUnit *SU = newSUnit(Old->getNode()); in Clone() local
91 SU->OrigNode = Old->OrigNode; in Clone()
92 SU->Latency = Old->Latency; in Clone()
93 SU->isVRegCycle = Old->isVRegCycle; in Clone()
94 SU->isCall = Old->isCall; in Clone()
95 SU->isCallOp = Old->isCallOp; in Clone()
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DScheduleDAGFast.cpp87 void AddPred(SUnit *SU, const SDep &D) { in AddPred() argument
88 SU->addPred(D); in AddPred()
93 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred() argument
94 SU->removePred(D); in RemovePred()
98 void ReleasePred(SUnit *SU, SDep *PredEdge);
99 void ReleasePredecessors(SUnit *SU, unsigned CurCycle);
139 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred() argument
160 void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigned CurCycle) { in ReleasePredecessors() argument
162 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in ReleasePredecessors()
164 ReleasePred(SU, &*I); in ReleasePredecessors()
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DScheduleDAGVLIW.cpp86 void releaseSucc(SUnit *SU, const SDep &D);
87 void releaseSuccessors(SUnit *SU);
88 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
115 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc() argument
130 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); in releaseSucc()
139 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { in releaseSuccessors() argument
141 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseSuccessors()
146 releaseSucc(SU, *I); in releaseSuccessors()
153 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in scheduleNodeTopDown() argument
155 DEBUG(SU->dump(this)); in scheduleNodeTopDown()
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DScheduleDAGSDNodes.h92 void InitVRegCycleFlag(SUnit *SU);
96 void InitNumRegDefsLeft(SUnit *SU);
100 virtual void computeLatency(SUnit *SU);
120 virtual void dumpNode(const SUnit *SU) const;
124 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
140 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
180 void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
DMachineScheduler.cpp392 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() argument
415 void ScheduleDAGMI::releaseSuccessors(SUnit *SU) { in releaseSuccessors() argument
416 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseSuccessors()
418 releaseSucc(SU, &*I); in releaseSuccessors()
426 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred() argument
449 void ScheduleDAGMI::releasePredecessors(SUnit *SU) { in releasePredecessors() argument
450 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in releasePredecessors()
452 releasePred(SU, &*I); in releasePredecessors()
571 updateScheduledPressure(const SUnit *SU, in updateScheduledPressure() argument
573 const PressureDiff &PDiff = getPressureDiff(SU); in updateScheduledPressure()
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DScheduleDAGInstrs.cpp243 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps() argument
244 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx); in addPhysRegDataDeps()
255 SUnit *UseSU = I->SU; in addPhysRegDataDeps()
256 if (UseSU == SU) in addPhysRegDataDeps()
265 Dep = SDep(SU, SDep::Artificial); in addPhysRegDataDeps()
269 SU->hasPhysRegDefs = true; in addPhysRegDataDeps()
270 Dep = SDep(SU, SDep::Data, *Alias); in addPhysRegDataDeps()
274 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse, in addPhysRegDataDeps()
277 ST.adjustSchedDependency(SU, UseSU, Dep); in addPhysRegDataDeps()
286 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps() argument
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DLatencyPriorityQueue.cpp55 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred() argument
57 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in getSingleUnscheduledPred()
72 void LatencyPriorityQueue::push(SUnit *SU) { in push() argument
76 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
78 if (getSingleUnscheduledPred(I->getSUnit()) == SU) in push()
81 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking; in push()
83 Queue.push_back(SU); in push()
91 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode() argument
92 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
104 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds() argument
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DScheduleDAG.cpp183 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty() local
184 SU->isDepthCurrent = false; in setDepthDirty()
185 for (SUnit::const_succ_iterator I = SU->Succs.begin(), in setDepthDirty()
186 E = SU->Succs.end(); I != E; ++I) { in setDepthDirty()
199 SUnit *SU = WorkList.pop_back_val(); in setHeightDirty() local
200 SU->isHeightCurrent = false; in setHeightDirty()
201 for (SUnit::const_pred_iterator I = SU->Preds.begin(), in setHeightDirty()
202 E = SU->Preds.end(); I != E; ++I) { in setHeightDirty()
472 SUnit *SU = &SUnits[i]; in InitDAGTopologicalSorting() local
473 int NodeNum = SU->NodeNum; in InitDAGTopologicalSorting()
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DPostRASchedulerList.cpp183 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
184 void ReleaseSuccessors(SUnit *SU);
185 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
254 if (SUnit *SU = Sequence[i]) in dumpSchedule() local
255 SU->dump(this); in dumpSchedule()
574 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc() argument
609 void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU) { in ReleaseSuccessors() argument
610 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in ReleaseSuccessors()
612 ReleaseSucc(SU, &*I); in ReleaseSuccessors()
619 void SchedulePostRATDList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in ScheduleNodeTopDown() argument
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/freebsd-10-stable/contrib/llvm/lib/Target/R600/
DR600MachineScheduler.cpp59 SUnit *SU = 0; in pickNode() local
95 if (!SU && ((AllowSwitchToAlu && CurInstKind != IDAlu) || in pickNode()
98 SU = pickAlu(); in pickNode()
99 if (!SU && !PhysicalRegCopy.empty()) { in pickNode()
100 SU = PhysicalRegCopy.front(); in pickNode()
103 if (SU) { in pickNode()
110 if (!SU) { in pickNode()
112 SU = pickOther(IDFetch); in pickNode()
113 if (SU) in pickNode()
118 if (!SU) { in pickNode()
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DR600MachineScheduler.h79 virtual void schedNode(SUnit *SU, bool IsTopNode);
80 virtual void releaseTopNode(SUnit *SU);
81 virtual void releaseBottomNode(SUnit *SU);
87 int getInstKind(SUnit *SU);
89 AluKind getAluKind(SUnit *SU) const;
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
DResourcePriorityQueue.h88 void addNode(const SUnit *SU) { in addNode() argument
92 void updateNode(const SUnit *SU) {} in updateNode() argument
110 signed SUSchedulingCost (SUnit *SU);
114 void initNumRegDefsLeft(SUnit *SU);
115 void updateNumRegDefsLeft(SUnit *SU);
116 signed regPressureDelta(SUnit *SU, bool RawPressure = false);
117 signed rawRegPressureDelta (SUnit *SU, unsigned RCId);
125 virtual void remove(SUnit *SU);
131 bool isResourceAvailable(SUnit *SU);
132 void reserveResources(SUnit *SU);
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DScheduleDAGInstrs.h36 SUnit *SU; member
38 VReg2SUnit(unsigned reg, SUnit *su): VirtReg(reg), SU(su) {} in VReg2SUnit()
48 SUnit *SU; member
52 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} in PhysRegSUOper()
164 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() argument
165 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) in getSchedClass()
166 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); in getSchedClass()
167 return SU->SchedClass; in getSchedClass()
222 virtual void dumpNode(const SUnit *SU) const;
225 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
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DMachineScheduler.h197 virtual void schedNode(SUnit *SU, bool IsTopNode) = 0;
201 virtual void releaseTopNode(SUnit *SU) = 0;
204 virtual void releaseBottomNode(SUnit *SU) = 0;
226 bool isInQueue(SUnit *SU) const { return (SU->NodeQueueId & ID); } in isInQueue() argument
242 iterator find(SUnit *SU) { in find() argument
243 return std::find(Queue.begin(), Queue.end(), SU); in find()
246 void push(SUnit *SU) { in push() argument
247 Queue.push_back(SU); in push()
248 SU->NodeQueueId |= ID; in push()
402 PressureDiff &getPressureDiff(const SUnit *SU) { in getPressureDiff() argument
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DScheduleDFS.h148 unsigned getNumInstrs(const SUnit *SU) const { in getNumInstrs() argument
149 return DFSNodeData[SU->NodeNum].InstrCount; in getNumInstrs()
161 ILPValue getILP(const SUnit *SU) const { in getILP() argument
162 return ILPValue(DFSNodeData[SU->NodeNum].InstrCount, 1 + SU->getDepth()); in getILP()
172 unsigned getSubtreeID(const SUnit *SU) const { in getSubtreeID() argument
175 assert(SU->NodeNum < DFSNodeData.size() && "New Node"); in getSubtreeID()
176 return DFSNodeData[SU->NodeNum].SubtreeID; in getSubtreeID()
DLatencyPriorityQueue.h57 void addNode(const SUnit *SU) { in addNode() argument
61 void updateNode(const SUnit *SU) { in updateNode() argument
84 virtual void remove(SUnit *SU);
95 void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
96 SUnit *getSingleUnscheduledPred(SUnit *SU);
DScheduleDAG.h165 void setSUnit(SUnit *SU) { in setSUnit() argument
166 Dep.setPointer(SU); in setSUnit()
493 virtual void addNode(const SUnit *SU) = 0;
494 virtual void updateNode(const SUnit *SU) = 0;
517 virtual void remove(SUnit *SU) = 0;
564 const MCInstrDesc *getInstrDesc(const SUnit *SU) const {
565 if (SU->isInstr()) return &SU->getInstr()->getDesc();
566 return getNodeDesc(SU->getNode());
575 virtual void dumpNode(const SUnit *SU) const = 0;
579 virtual std::string getGraphNodeLabel(const SUnit *SU) const = 0;
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/freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp26 void PPCScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction() argument
27 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction()
32 ScoreboardHazardRecognizer::EmitInstruction(SU); in EmitInstruction()
36 PPCScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
37 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls); in getHazardType()
137 getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
140 MachineInstr *MI = SU->getInstr(); in getHazardType()
197 void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) { in EmitInstruction() argument
198 MachineInstr *MI = SU->getInstr(); in EmitInstruction()
DPPCHazardRecognizers.h33 virtual HazardType getHazardType(SUnit *SU, int Stalls);
34 virtual void EmitInstruction(SUnit *SU);
68 virtual HazardType getHazardType(SUnit *SU, int Stalls);
69 virtual void EmitInstruction(SUnit *SU);
/freebsd-10-stable/contrib/opie/
DMakefile.in117 SU=@SU@
186 @if test ! -z $(SU); \
188 if test ! $(EXISTS) $(SU).$(BACKUP); \
191 mv $(SU) $(SU).$(BACKUP); \
193 chmod 0 $(SU).$(BACKUP); \
196 cp opiesu $(SU); \
198 $(CHOWN) $(OWNER) $(SU); \
199 chgrp $(GROUP) $(SU); \
201 chmod 4111 $(SU); \
263 …@-for i in $(SU) $(ALT_SU) $(LOGIN) $(FTPD); do FILE=`basename $$i`; if test ! $(EXISTS) $$i.$(BAC…
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/freebsd-10-stable/contrib/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp35 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument
38 MachineInstr *MI = SU->getInstr(); in getHazardType()
76 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls); in getHazardType()
85 void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction() argument
86 MachineInstr *MI = SU->getInstr(); in EmitInstruction()
92 ScoreboardHazardRecognizer::EmitInstruction(SU); in EmitInstruction()

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