Searched refs:SSE3 (Results 1 – 12 of 12) sorted by relevance
| /freebsd-10-stable/contrib/gcc/config/i386/ |
| D | i386.opt | 197 Target Report Mask(SSE3) 198 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation 202 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation 206 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
|
| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86Subtarget.h | 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator 261 bool hasSSE3() const { return X86SSELevel >= SSE3; } in hasSSE3()
|
| D | X86.td | 47 def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3", 48 "Enable SSE3 instructions",
|
| D | X86Subtarget.cpp | 211 if (ECX & 0x1) { X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3); } in AutoDetectSubtargetFeatures()
|
| D | X86InstrFormats.td | 492 // SSE3 Instruction Templates: 494 // S3I - SSE3 instructions with TB and OpSize prefixes. 495 // S3SI - SSE3 instructions with XS prefix. 496 // S3DI - SSE3 instructions with XD prefix.
|
| D | X86InstrFPStack.td | 462 // FISTTP requires SSE3 even though it's a FPStack op.
|
| D | X86InstrSSE.td | 4740 // SSE3 - Replicate Single FP - MOVSHDUP and MOVSLDUP 4801 // SSE3 - Replicate Double FP - MOVDDUP 4873 // SSE3 - Move Unaligned Integer 4893 // SSE3 - Arithmetic 4939 // SSE3 Instructions
|
| /freebsd-10-stable/contrib/llvm/tools/clang/lib/Basic/ |
| D | Targets.cpp | 1626 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator 2236 case SSE3: in setSSELevel() 2255 case SSE3: in setSSELevel() 2313 setSSELevel(Features, SSE3, true); in setXOPLevel() 2347 setSSELevel(Features, SSE3, Enabled); in setFeatureEnabledImpl() 2501 .Case("sse3", SSE3) in handleTargetFeatures() 2795 case SSE3: in getTargetDefines() 2815 case SSE3: in getTargetDefines() 2877 .Case("sse3", SSELevel >= SSE3) in hasFeature()
|
| /freebsd-10-stable/contrib/gcc/ |
| D | ChangeLog.gcc43 | 145 with SSE3 instruction set support.
|
| /freebsd-10-stable/contrib/gcclibs/libgomp/ |
| D | ChangeLog | 336 lp64 x86 targets. Do not check for SSE3 bit. Do not define bit_SSE3.
|
| /freebsd-10-stable/contrib/llvm/include/llvm/IR/ |
| D | IntrinsicsX86.td | 542 // SSE3
|
| /freebsd-10-stable/contrib/gcc/doc/ |
| D | invoke.texi | 9242 Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction 9246 SSE2 and SSE3 instruction set support. 9248 Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 9264 Improved versions of k8, opteron and athlon64 with SSE3 instruction set support. 9267 supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit 9580 SSE, SSE2, SSE3, SSSE3, SSE4A, ABM, AES or 3DNow! extended
|