Searched refs:LC1 (Results 1 – 9 of 9) sorted by relevance
| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfoV3.td | 26 P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
42 P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
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| D | HexagonRegisterInfo.td | 132 def LC1 : Rc<3, "lc1">, DwarfRegNum<[70]>;
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| D | HexagonRegisterInfo.cpp | 83 Reserved.set(Hexagon::LC1); in getReservedRegs()
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| D | HexagonHardwareLoops.cpp | 863 if (R == Hexagon::LC0 || R == Hexagon::LC1 || in isInvalidLoopOperation()
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| D | HexagonInstrInfo.td | 2047 R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
2055 R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 124 RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL; in softenSetCCOperands() local
128 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : in softenSetCCOperands()
133 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : in softenSetCCOperands()
138 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : in softenSetCCOperands()
143 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : in softenSetCCOperands()
148 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : in softenSetCCOperands()
153 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
157 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
161 LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : in softenSetCCOperands()
165 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
[all …]
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| /freebsd-10-stable/sys/dev/usb/ |
| D | usbdevs | 3380 product ONSPEC CFSM_COMBO 0xa109 USB to CF + SM Combo (LC1)
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| /freebsd-10-stable/contrib/gcc/ |
| D | ChangeLog-2006 | 4862 REG_ALLOC_ORDER): Add LT0, LT1, LC0, LC1, LB0, LB1.
4881 (rep_movsi, rep_movhi): Clobber LT1, LC1, LB1.
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| /freebsd-10-stable/contrib/gcc/doc/ |
| D | md.texi | 2191 LC0 or LC1.
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