| /freebsd-10-stable/crypto/openssl/engines/ |
| D | e_gmp.c | 329 mpz_t r0, r1, I0, m1; member 354 mpz_init(hptr->I0); in e_gmp_get_rsa() 381 mpz_clear(hptr->I0); in e_gmp_get_rsa() 402 mpz_clear(hptr->I0); in e_gmp_rsa_finish() 426 if (!bn2gmp(I, hptr->I0)) in e_gmp_rsa_mod_exp() 436 mpz_mod(hptr->r1, hptr->I0, hptr->q); in e_gmp_rsa_mod_exp() 439 mpz_mod(hptr->r1, hptr->I0, hptr->p); in e_gmp_rsa_mod_exp()
|
| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcFrameLowering.cpp | 184 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) in verifyLeafProcRegUse() 212 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc() 215 unsigned mapped_reg = (reg - SP::I0 + SP::O0); in remapRegsForLeafProc() 228 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc() 232 MBB->addLiveIn(reg - SP::I0 + SP::O0); in remapRegsForLeafProc()
|
| D | DelaySlotFiller.cpp | 373 if (reg < SP::I0 || reg > SP::I7) in combineRestoreADD() 385 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD() 401 if (reg < SP::I0 || reg > SP::I7) in combineRestoreOR() 424 OrMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreOR() 439 if (reg < SP::I0 || reg > SP::I7) in combineRestoreSETHIi() 458 RestoreMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreSETHIi()
|
| D | SparcCallingConv.td | 22 CCIfType<[i32, f32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>, 31 CCIfType<[i32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
|
| D | SparcRegisterInfo.td | 83 def I0 : Ri<24, "I0">, DwarfRegNum<[24]>;
|
| D | SparcISelLowering.cpp | 57 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in CC_Sparc_Assign_f64() 96 Reg = SP::I0 + Offset/8; in CC_Sparc64_Full() 141 unsigned Reg = SP::I0 + Offset/8; in CC_Sparc64_Half() 164 assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7 && "Unexpected enum"); in toCallerWindow() 165 if (Reg >= SP::I0 && Reg <= SP::I7) in toCallerWindow() 166 return Reg - SP::I0 + SP::O0; in toCallerWindow() 225 Chain = DAG.getCopyToReg(Chain, DL, SP::I0, Val, Flag); in LowerReturn_32() 227 RetOps.push_back(DAG.getRegister(SP::I0, getPointerTy())); in LowerReturn_32() 495 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 in LowerFormalArguments_32() 635 unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass); in LowerFormalArguments_64() [all …]
|
| /freebsd-10-stable/contrib/llvm/lib/Transforms/Vectorize/ |
| D | SLPVectorizer.cpp | 120 Instruction *I0 = dyn_cast<Instruction>(VL[0]); in getSameBlock() local 121 if (!I0) in getSameBlock() 123 BasicBlock *BB = I0->getParent(); in getSameBlock() 154 Instruction *I0 = dyn_cast<Instruction>(VL[0]); in getSameOpcode() local 155 if (!I0) in getSameOpcode() 157 unsigned Opcode = I0->getOpcode(); in getSameOpcode() 168 Instruction *I0 = cast<Instruction>(VL[0]); in propagateMetadata() local 170 I0->getAllMetadataOtherThanDebugLoc(Metadata); in propagateMetadata() 256 Instruction *I0 = dyn_cast<Instruction>(V0); in reorderInputsAccordingToOpcode() local 262 AllSameOpcodeLeft = I0; in reorderInputsAccordingToOpcode() [all …]
|
| /freebsd-10-stable/contrib/binutils/opcodes/ |
| D | ia64-opc-i.c | 25 #define I0 IA64_TYPE_I, 0 macro 114 {"break.i", I0, OpX3X6 (0, 0, 0x00), {IMMU21}, X_IN_MLX, 0, NULL}, 115 {"nop.i", I0, OpX3X6Yb (0, 0, 0x01, 0), {IMMU21}, X_IN_MLX, 0, NULL}, 116 {"hint.i", I0, OpX3X6Yb (0, 0, 0x01, 1), {IMMU21}, X_IN_MLX, 0, NULL}, 117 {"chk.s.i", I0, OpX3 (0, 1), {R2, TGT25b}, EMPTY}, 286 #undef I0
|
| /freebsd-10-stable/contrib/gcc/config/ia64/ |
| D | ia64.md | 226 cmp.ne %0, %I0 = r0, r0 227 cmp.eq %0, %I0 = r0, r0 230 tbit.nz %0, %I0 = %1, 0 1300 hard to optimize, and it creates unnecessary pressure on the I0 1422 tbit.nz.and.orcm %0, %I0 = %2, 0 1440 tbit.z.and.orcm %0, %I0 = %1, 0 1458 tbit.nz.or.andcm %0, %I0 = %2, 0 1476 tbit.z.or.andcm %0, %I0 = %1, 0" 1492 tbit.z %0, %I0 = %1, 0 1535 "cmp4.%C4.and.orcm %0, %I0 = %3, %r2" [all …]
|
| D | itanium2.md | 407 ;; to I0. The second I slot insn will issue to I1. 560 ;; For the MLI template, the I slot insn is always assigned to port I0 1336 ;; to I0. The second I slot insn will issue to I1. 1422 ;; For the MLI template, the I slot insn is always assigned to port I0
|
| /freebsd-10-stable/sys/tools/sound/ |
| D | feeder_rate_mkfilter.awk | 172 function I0(x, s, u, n, h, t) function 254 ibeta = I0(beta); 260 w = I0(beta * sqrt(1.0 - (x * x))) / ibeta;
|
| /freebsd-10-stable/contrib/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAddSub.cpp | 442 Instruction *I0 = dyn_cast<Instruction>(I->getOperand(0)); in performFactorization() local 445 if (!I0 || !I1 || I0->getOpcode() != I1->getOpcode()) in performFactorization() 449 if (I0->getOpcode() == Instruction::FMul) in performFactorization() 451 else if (I0->getOpcode() != Instruction::FDiv) in performFactorization() 454 Value *Opnd0_0 = I0->getOperand(0); in performFactorization() 455 Value *Opnd0_1 = I0->getOperand(1); in performFactorization()
|
| D | InstCombineSimplifyDemanded.cpp | 588 APInt I0 = C0->getValue(); in SimplifyDemandedUseBits() local 589 if ((I0 + 1).isPowerOf2() && (I0 | KnownZero).isAllOnesValue()) { in SimplifyDemandedUseBits()
|
| /freebsd-10-stable/contrib/llvm/patches/ |
| D | patch-r262261-llvm-r198145-sparc.diff | 101 unsigned IReg = SP::I0 + Offset/8; 136 + unsigned Offset = 8 * (VA.getLocReg() - SP::I0);
|
| D | patch-r262261-llvm-r198484-sparc.diff | 248 + Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,
|
| D | patch-r262261-llvm-r198591-sparc.diff | 314 + SP::I0, SP::I1, SP::I2, SP::I3,
|
| /freebsd-10-stable/libexec/getty/ |
| D | gettytab.h | 117 #define I0 gettynums[16].value macro
|
| D | subr.c | 246 tmode.c_iflag = I0; in set_flags()
|
| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 83 SP::I0, SP::I1, SP::I2, SP::I3,
|
| /freebsd-10-stable/sys/gnu/dts/arm/ |
| D | ste-href-family-pinctrl.dtsi | 651 "GPIO164_B21"; /* I0 */ 677 "GPIO164_B21"; /* I0 */
|
| /freebsd-10-stable/contrib/gdb/gdb/ |
| D | sparc-stub.c | 113 I0, I1, I2, I3, I4, I5, FP, I7, enumerator
|
| /freebsd-10-stable/contrib/gcc/config/soft-fp/ |
| D | op-2.h | 152 #define __FP_FRAC_SET_2(X,I1,I0) (X##_f0 = I0, X##_f1 = I1) argument
|
| D | op-4.h | 523 #define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \ argument 524 (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
|
| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 94 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,
|
| /freebsd-10-stable/contrib/sendmail/contrib/ |
| D | mail.local.linux | 158 MD0TH`%3B!'#`9<R,+@`HR9`)<@6<P&6T$7E"`8S&)L!,BD`/H`'"I0:H1@02
|