| /freebsd-10-stable/contrib/one-true-awk/ |
| D | awk.h | 123 #define FSIN 9 macro
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| D | lex.c | 79 { "sin", FSIN, BLTIN },
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| D | run.c | 1504 case FSIN: in bltin()
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| /freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 449 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1124 setOperationAction(ISD::FSIN, MVT::f32, Expand); in HexagonTargetLowering()
1125 setOperationAction(ISD::FSIN, MVT::f64, Expand); in HexagonTargetLowering()
1385 setOperationAction(ISD::FSIN , MVT::f64, Expand); in HexagonTargetLowering()
1388 setOperationAction(ISD::FSIN , MVT::f32, Expand); in HexagonTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| D | BasicTargetTransformInfo.cpp | 449 case Intrinsic::sin: ISD = ISD::FSIN; break; in getIntrinsicInstrCost()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 137 case ISD::FSIN: return "fsin"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 233 case ISD::FSIN: in LegalizeOp()
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| D | LegalizeFloatTypes.cpp | 92 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break; in SoftenFloatResult()
834 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break; in ExpandFloatResult()
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| D | LegalizeDAG.cpp | 2164 unsigned OtherOpcode = Node->getOpcode() == ISD::FSIN in useSinCos()
2165 ? ISD::FCOS : ISD::FSIN; in useSinCos()
3229 case ISD::FSIN: in ExpandNode()
3232 bool isSIN = Node->getOpcode() == ISD::FSIN; in ExpandNode()
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| D | LegalizeVectorTypes.cpp | 87 case ISD::FSIN: in ScalarizeVectorResult()
548 case ISD::FSIN: in SplitVectorResult()
1576 case ISD::FSIN: in WidenVectorResult()
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| D | SelectionDAGBuilder.cpp | 5015 case Intrinsic::sin: Opcode = ISD::FSIN; break; in visitIntrinsicCall()
5826 if (visitUnaryFloatCall(I, ISD::FSIN)) in visitCall()
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| D | DAGCombiner.cpp | 483 case ISD::FSIN: in isNegatibleForFree()
557 case ISD::FSIN: in GetNegatedExpression()
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| D | R600ISelLowering.cpp | 61 setOperationAction(ISD::FSIN, MVT::f32, Custom); in R600TargetLowering()
514 case ISD::FSIN: return LowerTrig(Op, DAG); in LowerOperation()
799 case ISD::FSIN: in LowerTrig()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1512 setOperationAction(ISD::FSIN , MVT::f128, Expand); in SparcTargetLowering()
1517 setOperationAction(ISD::FSIN , MVT::f64, Expand); in SparcTargetLowering()
1522 setOperationAction(ISD::FSIN , MVT::f32, Expand); in SparcTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 217 setOperationAction(ISD::FSIN, MVT::f32, Expand); in AArch64TargetLowering()
218 setOperationAction(ISD::FSIN, MVT::f64, Expand); in AArch64TargetLowering()
238 setOperationAction(ISD::FSIN, MVT::f128, Expand); in AArch64TargetLowering()
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 376 def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 316 setOperationAction(ISD::FSIN, MVT::f32, Expand); in MipsTargetLowering()
317 setOperationAction(ISD::FSIN, MVT::f64, Expand); in MipsTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 495 setOperationAction(ISD::FSIN, MVT::v2f64, Expand); in ARMTargetLowering()
513 setOperationAction(ISD::FSIN, MVT::v4f32, Expand); in ARMTargetLowering()
530 setOperationAction(ISD::FSIN, MVT::v2f32, Expand); in ARMTargetLowering()
836 setOperationAction(ISD::FSIN, MVT::f64, Expand); in ARMTargetLowering()
837 setOperationAction(ISD::FSIN, MVT::f32, Expand); in ARMTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 670 setOperationAction(ISD::FSIN , MVT::f64, Expand); in resetOperationActions()
673 setOperationAction(ISD::FSIN , MVT::f32, Expand); in resetOperationActions()
700 setOperationAction(ISD::FSIN , MVT::f32, Expand); in resetOperationActions()
712 setOperationAction(ISD::FSIN , MVT::f64, Expand); in resetOperationActions()
728 setOperationAction(ISD::FSIN , MVT::f64, Expand); in resetOperationActions()
729 setOperationAction(ISD::FSIN , MVT::f32, Expand); in resetOperationActions()
770 setOperationAction(ISD::FSIN , MVT::f80, Expand); in resetOperationActions()
819 setOperationAction(ISD::FSIN, VT, Expand); in resetOperationActions()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 126 setOperationAction(ISD::FSIN , MVT::f64, Expand); in PPCTargetLowering()
132 setOperationAction(ISD::FSIN , MVT::f32, Expand); in PPCTargetLowering()
404 setOperationAction(ISD::FSIN, VT, Expand); in PPCTargetLowering()
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 237 setOperationAction(ISD::FSIN, VT, Expand); in SystemZTargetLowering()
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