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Searched refs:FEXP2 (Results 1 – 17 of 17) sorted by relevance

/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
DISDOpcodes.h450 FLOG, FLOG2, FLOG10, FEXP, FEXP2, enumerator
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
DTargetLoweringBase.cpp751 setOperationAction(ISD::FEXP2, MVT::f16, Expand); in initActions()
761 setOperationAction(ISD::FEXP2, MVT::f32, Expand); in initActions()
771 setOperationAction(ISD::FEXP2, MVT::f64, Expand); in initActions()
781 setOperationAction(ISD::FEXP2, MVT::f128, Expand); in initActions()
DBasicTargetTransformInfo.cpp452 case Intrinsic::exp2: ISD = ISD::FEXP2; break; in getIntrinsicInstrCost()
/freebsd-10-stable/contrib/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp55 setOperationAction(ISD::FEXP2, MVT::f32, Legal); in AMDGPUTargetLowering()
373 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp147 case ISD::FEXP2: return "fexp2"; in getOperationName()
DLegalizeVectorOps.cpp241 case ISD::FEXP2: in LegalizeOp()
DLegalizeFloatTypes.cpp75 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; in SoftenFloatResult()
820 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break; in ExpandFloatResult()
DLegalizeVectorTypes.cpp75 case ISD::FEXP2: in ScalarizeVectorResult()
535 case ISD::FEXP2: in SplitVectorResult()
1567 case ISD::FEXP2: in WidenVectorResult()
DLegalizeDAG.cpp3278 case ISD::FEXP2: in ExpandNode()
4040 case ISD::FEXP2: in PromoteNode()
DSelectionDAGBuilder.cpp4291 return DAG.getNode(ISD::FEXP2, dl, Op.getValueType(), Op); in expandExp2()
5889 if (visitUnaryFloatCall(I, ISD::FEXP2)) in visitCall()
/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp227 setOperationAction(ISD::FEXP2, Ty, Legal); in addMSAFloatType()
1733 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2))); in lowerINTRINSIC_WO_CHAIN()
DMipsMSAInstrInfo.td2045 // 1.0 when we only need to match ISD::FEXP2.
/freebsd-10-stable/contrib/llvm/include/llvm/Target/
DTargetSelectionDAG.td378 def fexp2 : SDNode<"ISD::FEXP2" , SDTFPUnaryOp>;
/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp196 setOperationAction(ISD::FEXP2, MVT::f32, Expand); in AArch64TargetLowering()
197 setOperationAction(ISD::FEXP2, MVT::f64, Expand); in AArch64TargetLowering()
/freebsd-10-stable/contrib/llvm/lib/Target/ARM/
DARMISelLowering.cpp503 setOperationAction(ISD::FEXP2, MVT::v2f64, Expand); in ARMTargetLowering()
521 setOperationAction(ISD::FEXP2, MVT::v4f32, Expand); in ARMTargetLowering()
538 setOperationAction(ISD::FEXP2, MVT::v2f32, Expand); in ARMTargetLowering()
/freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp403 setOperationAction(ISD::FEXP2, VT, Expand); in PPCTargetLowering()
/freebsd-10-stable/contrib/llvm/lib/Target/X86/
DX86ISelLowering.cpp792 setOperationAction(ISD::FEXP2, MVT::f80, Expand); in resetOperationActions()
854 setOperationAction(ISD::FEXP2, VT, Expand); in resetOperationActions()