| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86Subtarget.cpp | 194 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in AutoDetectSubtargetFeatures() local
205 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX); in AutoDetectSubtargetFeatures()
304 X86_MC::GetCpuIDAndInfo(0x80000000, &MaxExtLevel, &EBX, &ECX, &EDX); in AutoDetectSubtargetFeatures()
307 X86_MC::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); in AutoDetectSubtargetFeatures()
338 if (!X86_MC::GetCpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX)) { in AutoDetectSubtargetFeatures()
339 if (IsIntel && (EBX & 0x1)) { in AutoDetectSubtargetFeatures()
343 if ((EBX >> 3) & 0x1) { in AutoDetectSubtargetFeatures()
347 if ((EBX >> 4) & 0x1) { in AutoDetectSubtargetFeatures()
351 if (IsIntel && ((EBX >> 5) & 0x1)) { in AutoDetectSubtargetFeatures()
355 if (IsIntel && ((EBX >> 8) & 0x1)) { in AutoDetectSubtargetFeatures()
[all …]
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| D | X86RegisterInfo.cpp | 91 case X86::EBX: case X86::RBX: return 1; in getCompactUnwindRegNum()
542 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
554 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
591 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
627 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
628 return X86::EBX; in getX86SubSuperRegister()
663 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
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| D | X86RegisterInfo.td | 108 def EBX : X86Reg<"ebx", 3, [BX]>, DwarfRegNum<[-2, 3, 3]>;
132 def RBX : X86Reg<"rbx", 3, [EBX]>, DwarfRegNum<[3, -2, -2]>;
332 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP,
362 def GR32_ABCD : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX, EBX)>;
383 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP)>;
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| D | X86MCInstLower.cpp | 644 LEA.addOperand(MCOperand::CreateReg(X86::EBX)); // base in LowerTlsAddr()
654 LEA.addOperand(MCOperand::CreateReg(X86::EBX)); // index in LowerTlsAddr()
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| D | X86CallingConv.td | 503 CCIfType<[i32], CCAssignToReg<[EBX, EBP, EDI, ESI]>>
591 def CSR_32 : CalleeSavedRegs<(add ESI, EDI, EBX, EBP)>;
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| D | X86FastISel.cpp | 2146 X86::EBX).addReg(Base); in DoSelectCall()
2216 MIB.addReg(X86::EBX, RegState::Implicit); in DoSelectCall()
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| /freebsd-10-stable/sys/i386/i386/ |
| D | bpf_jit_machdep.c | 213 PUSH(EBX); in bpf_jit_compile()
214 MOVodd(8, EBP, EBX); in bpf_jit_compile()
233 POP(EBX); in bpf_jit_compile()
245 POP(EBX); in bpf_jit_compile()
263 POP(EBX); in bpf_jit_compile()
268 MOVobd(EBX, ESI, EAX); in bpf_jit_compile()
281 POP(EBX); in bpf_jit_compile()
286 MOVobw(EBX, ESI, AX); in bpf_jit_compile()
295 POP(EBX); in bpf_jit_compile()
300 MOVobb(EBX, ESI, AL); in bpf_jit_compile()
[all …]
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| D | bpf_jit_machdep.h | 43 #define EBX 3 macro
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| /freebsd-10-stable/contrib/llvm/lib/Support/ |
| D | Host.cpp | 196 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUName() local
197 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX)) in getHostCPUName()
219 !GetX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX) && in getHostCPUName()
220 (EBX & 0x20); in getHostCPUName()
221 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); in getHostCPUName()
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| /freebsd-10-stable/sys/cddl/dev/dtrace/x86/ |
| D | regset.h | 136 #define EBX 8 macro
157 #define EBX 7
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| /freebsd-10-stable/sys/boot/pc98/btx/lib/ |
| D | btxv86.s | 38 .set V86_EBX,0x24 # V86 EBX
66 xchgl %ebx,V86_EBX(%ebp) # Swap EBX
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| /freebsd-10-stable/sys/boot/i386/btx/lib/ |
| D | btxv86.s | 38 .set V86_EBX,0x24 # V86 EBX
66 xchgl %ebx,V86_EBX(%ebp) # Swap EBX
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| /freebsd-10-stable/contrib/llvm/include/llvm/Support/ |
| D | Solaris.h | 38 #undef EBX
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| /freebsd-10-stable/contrib/gdb/gdb/ |
| D | i386v4-nat.c | 95 EAX, ECX, EDX, EBX,
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| D | i386v-nat.c | 71 EAX, ECX, EDX, EBX,
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| D | i386-stub.c | 122 enum regnames {EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, enumerator
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.h | 47 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator
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| D | X86AsmBackend.cpp | 602 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0 in getCompactUnwindRegNum()
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 137 ENTRY(EBX) \
155 ENTRY(EBX) \
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| /freebsd-10-stable/cddl/contrib/opensolaris/lib/libdtrace/i386/ |
| D | regs.sed.in | 52 SED_REPLACE(EBX)
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| D | regs.d.in | 46 inline int R_EBX = @EBX@;
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| /freebsd-10-stable/sys/amd64/amd64/ |
| D | bpf_jit_machdep.h | 60 #define EBX 3 macro
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 897 case X86::RBX: return X86::EBX; in getGR32FromGR64()
1189 unsigned RegNo = is64BitMode() ? X86::RBX : X86::EBX; in CreateMemForInlineAsm()
1607 unsigned RegNo = is64BitMode() ? X86::RBX : X86::EBX; in ParseIntelOffsetOfOperator()
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| /freebsd-10-stable/sys/boot/pc98/cdboot/ |
| D | cdboot.S | 657 # Load DH sectors starting at LBA EAX into [EBX].
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| /freebsd-10-stable/sys/cddl/contrib/opensolaris/uts/intel/dtrace/ |
| D | fasttrap_isa.c | 256 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI
|