| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCTargetDesc.cpp | 86 CodeModel::Model CM, in createSparcMCCodeGenInfo() argument 92 switch (CM) { in createSparcMCCodeGenInfo() 95 case CodeModel::JITDefault: CM = CodeModel::Small; break; in createSparcMCCodeGenInfo() 98 X->InitMCCodeGenInfo(RM, CM, OL); in createSparcMCCodeGenInfo() 103 CodeModel::Model CM, in createSparcV9MCCodeGenInfo() argument 109 switch (CM) { in createSparcV9MCCodeGenInfo() 112 CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium; in createSparcV9MCCodeGenInfo() 115 CM = CodeModel::Large; in createSparcV9MCCodeGenInfo() 119 X->InitMCCodeGenInfo(RM, CM, OL); in createSparcV9MCCodeGenInfo()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM, in SparcTargetMachine() argument 34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in SparcTargetMachine() 90 CodeModel::Model CM, in SparcV8TargetMachine() argument 92 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in SparcV8TargetMachine() 102 CodeModel::Model CM, in SparcV9TargetMachine() argument 104 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in SparcV9TargetMachine()
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| D | SparcTargetMachine.h | 40 Reloc::Model RM, CodeModel::Model CM, 75 Reloc::Model RM, CodeModel::Model CM, 87 Reloc::Model RM, CodeModel::Model CM,
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| /freebsd-10-stable/usr.bin/tip/tip/ |
| D | acu.c | 75 if (CM != NOSTR) in con() 76 parwrite(FD, CM, size(CM)); in con() 149 if (CM != NOSTR) in con() 150 parwrite(FD, CM, size(CM)); in con()
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| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 68 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine() argument 70 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in NVPTXTargetMachine() 82 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine32() argument 84 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in NVPTXTargetMachine32() 90 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine64() argument 92 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in NVPTXTargetMachine64()
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| D | NVPTXTargetMachine.h | 52 CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit); 103 Reloc::Model RM, CodeModel::Model CM, 112 Reloc::Model RM, CodeModel::Model CM,
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 73 CodeModel::Model CM, in createAArch64MCCodeGenInfo() argument 83 if (CM == CodeModel::Default) in createAArch64MCCodeGenInfo() 84 CM = CodeModel::Small; in createAArch64MCCodeGenInfo() 85 else if (CM == CodeModel::JITDefault) { in createAArch64MCCodeGenInfo() 89 CM = CodeModel::Large; in createAArch64MCCodeGenInfo() 92 X->InitMCCodeGenInfo(RM, CM, OL); in createAArch64MCCodeGenInfo()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 76 Reloc::Model RM, CodeModel::Model CM, in PPCTargetMachine() argument 79 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in PPCTargetMachine() 97 Reloc::Model RM, CodeModel::Model CM, in PPC32TargetMachine() argument 99 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in PPC32TargetMachine() 107 Reloc::Model RM, CodeModel::Model CM, in PPC64TargetMachine() argument 109 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in PPC64TargetMachine()
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| D | PPCTargetMachine.h | 43 Reloc::Model RM, CodeModel::Model CM, 83 Reloc::Model RM, CodeModel::Model CM, 94 Reloc::Model RM, CodeModel::Model CM,
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| /freebsd-10-stable/sys/gnu/dts/arm/ |
| D | omap3-sbc-t3730.dts | 2 * Suppport for CompuLab SBC-T3730 with CM-T3730 9 model = "CompuLab SBC-T3730 with CM-T3730"; 30 ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ 32 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
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| D | omap3-sbc-t3530.dts | 2 * Suppport for CompuLab SBC-T3530 with CM-T3530 9 model = "CompuLab SBC-T3530 with CM-T3530"; 30 ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ 32 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
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| D | omap3-sbc-t3517.dts | 2 * Suppport for CompuLab SBC-T3517 with CM-T3517 9 model = "CompuLab SBC-T3517 with CM-T3517"; 17 /* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */ 74 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsTargetMachine.cpp | 58 Reloc::Model RM, CodeModel::Model CM, in MipsTargetMachine() argument 61 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MipsTargetMachine() 120 Reloc::Model RM, CodeModel::Model CM, in MipsebTargetMachine() argument 122 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in MipsebTargetMachine() 129 Reloc::Model RM, CodeModel::Model CM, in MipselTargetMachine() argument 131 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in MipselTargetMachine()
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| D | MipsTargetMachine.h | 53 Reloc::Model RM, CodeModel::Model CM, 108 Reloc::Model RM, CodeModel::Model CM, 119 Reloc::Model RM, CodeModel::Model CM,
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 36 Reloc::Model RM, CodeModel::Model CM, in X86_32TargetMachine() argument 38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), in X86_32TargetMachine() 60 Reloc::Model RM, CodeModel::Model CM, in X86_64TargetMachine() argument 62 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true), in X86_64TargetMachine() 81 Reloc::Model RM, CodeModel::Model CM, in X86TargetMachine() argument 84 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in X86TargetMachine()
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| D | X86TargetMachine.h | 40 Reloc::Model RM, CodeModel::Model CM, 89 Reloc::Model RM, CodeModel::Model CM, 118 Reloc::Model RM, CodeModel::Model CM,
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMTargetMachine.cpp | 48 Reloc::Model RM, CodeModel::Model CM, in ARMBaseTargetMachine() argument 50 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMBaseTargetMachine() 73 Reloc::Model RM, CodeModel::Model CM, in ARMTargetMachine() argument 75 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMTargetMachine() 99 Reloc::Model RM, CodeModel::Model CM, in ThumbTargetMachine() argument 101 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ThumbTargetMachine()
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| D | ARMTargetMachine.h | 44 Reloc::Model RM, CodeModel::Model CM, 79 Reloc::Model RM, CodeModel::Model CM, 117 Reloc::Model RM, CodeModel::Model CM,
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.cpp | 128 CodeModel::Model CM, in createSystemZMCCodeGenInfo() argument 166 if (CM == CodeModel::Default) in createSystemZMCCodeGenInfo() 167 CM = CodeModel::Small; in createSystemZMCCodeGenInfo() 168 else if (CM == CodeModel::JITDefault) in createSystemZMCCodeGenInfo() 169 CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium; in createSystemZMCCodeGenInfo() 170 X->InitMCCodeGenInfo(RM, CM, OL); in createSystemZMCCodeGenInfo()
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| /freebsd-10-stable/contrib/llvm/patches/ |
| D | patch-r262261-llvm-r199977-sparc.diff | 284 - if (CM == CodeModel::Default) 285 - CM = RM == Reloc::PIC_ ? CodeModel::Medium : CodeModel::Small; 288 + switch (CM) { 291 + case CodeModel::JITDefault: CM = CodeModel::Small; break; 294 X->InitMCCodeGenInfo(RM, CM, OL); 301 - if (CM == CodeModel::Default) 302 - CM = CodeModel::Medium; 305 + switch (CM) { 308 + CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium; 311 + CM = CodeModel::Large; [all …]
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| /freebsd-10-stable/contrib/llvm/lib/MC/ |
| D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, in InitMCCodeGenInfo() argument 21 CMModel = CM; in InitMCCodeGenInfo()
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| /freebsd-10-stable/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/ |
| D | BoolAssignmentChecker.cpp | 81 ConstraintManager &CM = C.getConstraintManager(); in checkBind() local 99 llvm::tie(stateGE, stateLT) = CM.assumeDual(state, *greaterThanEqualToZero); in checkBind() 135 llvm::tie(stateLE, stateGT) = CM.assumeDual(state, *lessThanEqToOne); in checkBind()
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 308 CodeModel::Model CM, in createX86MCCodeGenInfo() argument 347 if (CM == CodeModel::Default) in createX86MCCodeGenInfo() 348 CM = CodeModel::Small; in createX86MCCodeGenInfo() 349 else if (CM == CodeModel::JITDefault) in createX86MCCodeGenInfo() 351 CM = is64Bit ? CodeModel::Large : CodeModel::Small; in createX86MCCodeGenInfo() 353 X->InitMCCodeGenInfo(RM, CM, OL); in createX86MCCodeGenInfo()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCTargetDesc.cpp | 89 CodeModel::Model CM, in createPPCMCCodeGenInfo() argument 100 if (CM == CodeModel::Default) { in createPPCMCCodeGenInfo() 104 CM = CodeModel::Medium; in createPPCMCCodeGenInfo() 106 X->InitMCCodeGenInfo(RM, CM, OL); in createPPCMCCodeGenInfo()
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZSubtarget.cpp | 53 CodeModel::Model CM) const { in isPC32DBLSymbol() 60 if (CM == CodeModel::Small) in isPC32DBLSymbol()
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