Home
last modified time | relevance | path

Searched refs:CACHE_FIFO_SIZE (Results 1 – 8 of 8) sorted by relevance

/freebsd-10-stable/sys/dev/drm2/radeon/
Dnid.h350 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
Drv770d.h284 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
Drv770.c667 sq_ms_fifo_sizes = (CACHE_FIFO_SIZE(16 * rdev->config.rv770.sq_num_cf_insts) | in rv770_gpu_init()
Devergreend.h653 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
Dr600d.h469 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
Dni.c746 WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.cayman.sq_num_cf_insts) | in cayman_gpu_init()
Devergreen.c2218 WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.evergreen.sq_num_cf_insts) | in evergreen_gpu_init()
Dr600.c1732 tmp = (CACHE_FIFO_SIZE(0xa) | in r600_gpu_init()