Searched refs:BaseOffs (Results 1 – 13 of 13) sorted by relevance
| /freebsd-10-stable/contrib/llvm/lib/Transforms/Scalar/ |
| D | CodeGenPrepare.cpp | 830 (BaseGV == O.BaseGV) && (BaseOffs == O.BaseOffs) && in operator ==()
852 if (BaseOffs) in print()
853 OS << (NeedPlus ? " + " : "") << BaseOffs, NeedPlus = true; in print()
972 TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale; in MatchScaledValue()
1116 AddrMode.BaseOffs += ConstantOffset; in MatchOperationAddr()
1122 AddrMode.BaseOffs -= ConstantOffset; in MatchOperationAddr()
1131 AddrMode.BaseOffs += ConstantOffset; in MatchOperationAddr()
1156 AddrMode.BaseOffs += ConstantOffset; in MatchOperationAddr()
1180 AddrMode.BaseOffs += CI->getSExtValue(); in MatchAddr()
1183 AddrMode.BaseOffs -= CI->getSExtValue(); in MatchAddr()
[all …]
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| /freebsd-10-stable/contrib/llvm/lib/Analysis/ |
| D | BasicAliasAnalysis.cpp | 283 DecomposeGEPExpression(const Value *V, int64_t &BaseOffs, in DecomposeGEPExpression() argument
289 BaseOffs = 0; in DecomposeGEPExpression()
350 BaseOffs += TD->getStructLayout(STy)->getElementOffset(FieldNo); in DecomposeGEPExpression()
357 BaseOffs += TD->getTypeAllocSize(*GTI)*CIdx->getSExtValue(); in DecomposeGEPExpression()
377 BaseOffs += IndexOffset.getSExtValue()*Scale; in DecomposeGEPExpression()
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| /freebsd-10-stable/contrib/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1627 return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs); in isLegalAddressingMode()
1633 AM.BaseOffs%4 == 0; in isLegalAddressingMode()
1640 return isImmUs(AM.BaseOffs); in isLegalAddressingMode()
1643 return AM.Scale == 1 && AM.BaseOffs == 0; in isLegalAddressingMode()
1648 return isImmUs2(AM.BaseOffs); in isLegalAddressingMode()
1651 return AM.Scale == 2 && AM.BaseOffs == 0; in isLegalAddressingMode()
1655 return isImmUs4(AM.BaseOffs); in isLegalAddressingMode()
1658 return AM.Scale == 4 && AM.BaseOffs == 0; in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| D | BasicTargetTransformInfo.cpp | 147 AM.BaseOffs = BaseOffset; in isLegalAddressingMode()
158 AM.BaseOffs = BaseOffset; in getScalingFactorCost()
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| D | TargetLoweringBase.cpp | 1346 if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) in isLegalAddressingMode()
1358 if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed. in isLegalAddressingMode()
1363 if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed. in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1129 int64_t BaseOffs; member
1132 AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1651 if (AM.BaseOffs <= -(1LL << 13) || AM.BaseOffs >= (1LL << 13)-1) { in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7760 if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) in isLegalAddressingMode()
7772 if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed. in isLegalAddressingMode()
7777 if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed. in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 1970 if (AM.BaseOffs || AM.HasBaseReg || AM.Scale) in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 330 if (!isInt<20>(AM.BaseOffs)) in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 7075 AM.BaseOffs = Offset->getSExtValue(); in canFoldInAddressingMode()
7083 AM.BaseOffs = -Offset->getSExtValue(); in canFoldInAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 10458 if (!isLegalAddressImmediate(AM.BaseOffs, VT, Subtarget)) in isLegalAddressingMode()
10474 if (AM.BaseOffs) in isLegalAddressingMode()
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 13890 if (!X86::isOffsetSuitableForCodeModel(AM.BaseOffs, M, AM.BaseGV != NULL)) in isLegalAddressingMode()
13908 Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1)) in isLegalAddressingMode()
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